JPS57162327A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57162327A
JPS57162327A JP4816381A JP4816381A JPS57162327A JP S57162327 A JPS57162327 A JP S57162327A JP 4816381 A JP4816381 A JP 4816381A JP 4816381 A JP4816381 A JP 4816381A JP S57162327 A JPS57162327 A JP S57162327A
Authority
JP
Japan
Prior art keywords
gas
substrate
cover
semiconductor substrate
inlet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4816381A
Other languages
Japanese (ja)
Inventor
Teruo Kozai
Mikio Mori
Yoshihiko Ito
Michiaki Nishikawa
Junichi Ikeda
Makoto Akikusa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP4816381A priority Critical patent/JPS57162327A/en
Publication of JPS57162327A publication Critical patent/JPS57162327A/en
Pending legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)

Abstract

PURPOSE:To eliminate the formation of a mound caused by the adhesion of a reactive product by maintaining the main surface to be formed with a thin layer such as an epitaxial layer of a semiconductor substrate at lower than 90 deg. with respect to the horizontal surface to form the thin layer. CONSTITUTION:A cover 8 is opened, an N<+> type semiconductor substrate 12 is supported on a susceptor holder 19 with the surface engaged with the substrate 12 downside in a furnace core tube 1, an assembly having an angle theta set to lower than 90 deg. is inserted, and the cover 8 is closed. Then, inert gas such as nitrogen gas is introduced from a gas inlet 6 to substitute for the interior of the tube 1, a high frequency heating coil 9 is energized, and is heated to approx. 1,200 deg.C. Impurity gas P2O5 is introduced with reaction gas 13 such as tetrachlorided silicon gas, hydrogen gas or trichlorosilane gas and hydrogen gas from the inlet 6, and an N<-> type epitaxial layer is grown on the substrate 12 by reduction reaction.
JP4816381A 1981-03-30 1981-03-30 Manufacture of semiconductor device Pending JPS57162327A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4816381A JPS57162327A (en) 1981-03-30 1981-03-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4816381A JPS57162327A (en) 1981-03-30 1981-03-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57162327A true JPS57162327A (en) 1982-10-06

Family

ID=12795708

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4816381A Pending JPS57162327A (en) 1981-03-30 1981-03-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57162327A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6117494A (en) * 1984-07-02 1986-01-25 Nec Corp Device for vapor-phase growth

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4935152U (en) * 1972-06-24 1974-03-28
JPS4936551A (en) * 1972-06-29 1974-04-04

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4935152U (en) * 1972-06-24 1974-03-28
JPS4936551A (en) * 1972-06-29 1974-04-04

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6117494A (en) * 1984-07-02 1986-01-25 Nec Corp Device for vapor-phase growth

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