JPS57162164A - Data transfer device - Google Patents

Data transfer device

Info

Publication number
JPS57162164A
JPS57162164A JP56046808A JP4680881A JPS57162164A JP S57162164 A JPS57162164 A JP S57162164A JP 56046808 A JP56046808 A JP 56046808A JP 4680881 A JP4680881 A JP 4680881A JP S57162164 A JPS57162164 A JP S57162164A
Authority
JP
Japan
Prior art keywords
page
data transfer
transfer device
base address
main storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56046808A
Other languages
Japanese (ja)
Other versions
JPH035625B2 (en
Inventor
Masayuki Mizuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56046808A priority Critical patent/JPS57162164A/en
Publication of JPS57162164A publication Critical patent/JPS57162164A/en
Publication of JPH035625B2 publication Critical patent/JPH035625B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To achieve effective use of a main memory of a imaginary storage system main processor, by transferring data through the discrimination if a page indicated with a page base address is a true objective page. CONSTITUTION:The access of a slave processor 2 receiving a data processing request to a main storage device 7 of a master processor 1 is made via data transfer device 3. Via a connecting bus 16, information required for data transfer such as identification number of page, an address on a main storage of the identification number, a page base address, and relative location information in the page is transferred. The data transfer device 3 confirms if the page on a main storage device 7 indicated with the designated page base address is a true objective page, and the data transfer is made if the page is a requested page.
JP56046808A 1981-03-30 1981-03-30 Data transfer device Granted JPS57162164A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56046808A JPS57162164A (en) 1981-03-30 1981-03-30 Data transfer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56046808A JPS57162164A (en) 1981-03-30 1981-03-30 Data transfer device

Publications (2)

Publication Number Publication Date
JPS57162164A true JPS57162164A (en) 1982-10-05
JPH035625B2 JPH035625B2 (en) 1991-01-28

Family

ID=12757624

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56046808A Granted JPS57162164A (en) 1981-03-30 1981-03-30 Data transfer device

Country Status (1)

Country Link
JP (1) JPS57162164A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63311467A (en) * 1987-06-12 1988-12-20 Nec Corp Virtual storage managing system for multi-processor system
JPS63311468A (en) * 1987-06-12 1988-12-20 Nec Corp Virtual storage managing system for multi-processor system
WO2004102401A1 (en) * 2003-05-13 2004-11-25 Fujitsu Limited I/o device, computer, computer system, i/o control program, os, page management program, and page management method
JP2010191818A (en) * 2009-02-19 2010-09-02 Canon Inc Information processor and control method therefor

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63311467A (en) * 1987-06-12 1988-12-20 Nec Corp Virtual storage managing system for multi-processor system
JPS63311468A (en) * 1987-06-12 1988-12-20 Nec Corp Virtual storage managing system for multi-processor system
JPH0534705B2 (en) * 1987-06-12 1993-05-24 Nippon Electric Co
WO2004102401A1 (en) * 2003-05-13 2004-11-25 Fujitsu Limited I/o device, computer, computer system, i/o control program, os, page management program, and page management method
US7430649B2 (en) 2003-05-13 2008-09-30 Fujitsu Limited Input/output device, computer, computer system, input/output control program, OS, page management program, and page management method
JP2010191818A (en) * 2009-02-19 2010-09-02 Canon Inc Information processor and control method therefor

Also Published As

Publication number Publication date
JPH035625B2 (en) 1991-01-28

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