JPS57155658A - Duplex structure central processor - Google Patents

Duplex structure central processor

Info

Publication number
JPS57155658A
JPS57155658A JP56041350A JP4135081A JPS57155658A JP S57155658 A JPS57155658 A JP S57155658A JP 56041350 A JP56041350 A JP 56041350A JP 4135081 A JP4135081 A JP 4135081A JP S57155658 A JPS57155658 A JP S57155658A
Authority
JP
Japan
Prior art keywords
instruction
cpu0
cpu
time
cpu1
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56041350A
Other languages
Japanese (ja)
Other versions
JPS596416B2 (en
Inventor
Takatoshi Osada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56041350A priority Critical patent/JPS596416B2/en
Publication of JPS57155658A publication Critical patent/JPS57155658A/en
Publication of JPS596416B2 publication Critical patent/JPS596416B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To decrease the processing time of an instruction given from a CPU in operation for a queuing redundant system comprising a using CPU and a spare CPU, by reading an instruction given from a main storage device through the spare CPU with a command of the using CPU to transmit the instruction to the using CPU. CONSTITUTION:A using CPU0 gives a command to a spare CPU1 to carry out a process formed with an instruction Ai and reads the instruction Ai and a data through a main storage device MM and in the reading time FTi to transfer them to the CPU0. Then the CPU0 executes successively the received instruction Ai with the executing time ETi, and the CPU1 sends the data necessary for an access back to the device MM. In such way, each instruction Ai to be executed by the CPU0 is extracted previously by the CPU1 out of the device MM and then transmitted to the CPU0. As a result, the process time ATi of each instruction Ai of the CPU0 is nearly equal to the execution time ETi of the Ai. Thus the instruction process time is decreased by the time FTi of the instruction Ai.
JP56041350A 1981-03-20 1981-03-20 Redundant central processing unit Expired JPS596416B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56041350A JPS596416B2 (en) 1981-03-20 1981-03-20 Redundant central processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56041350A JPS596416B2 (en) 1981-03-20 1981-03-20 Redundant central processing unit

Publications (2)

Publication Number Publication Date
JPS57155658A true JPS57155658A (en) 1982-09-25
JPS596416B2 JPS596416B2 (en) 1984-02-10

Family

ID=12606056

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56041350A Expired JPS596416B2 (en) 1981-03-20 1981-03-20 Redundant central processing unit

Country Status (1)

Country Link
JP (1) JPS596416B2 (en)

Also Published As

Publication number Publication date
JPS596416B2 (en) 1984-02-10

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