JPS57152585A - Nonvolatile semiconductor memory - Google Patents

Nonvolatile semiconductor memory

Info

Publication number
JPS57152585A
JPS57152585A JP3635081A JP3635081A JPS57152585A JP S57152585 A JPS57152585 A JP S57152585A JP 3635081 A JP3635081 A JP 3635081A JP 3635081 A JP3635081 A JP 3635081A JP S57152585 A JPS57152585 A JP S57152585A
Authority
JP
Japan
Prior art keywords
threshold voltage
electric potential
generating circuit
potential generating
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3635081A
Other languages
Japanese (ja)
Other versions
JPS6145319B2 (en
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3635081A priority Critical patent/JPS57152585A/en
Priority to GB8136789A priority patent/GB2089612B/en
Priority to US06/329,059 priority patent/US4467457A/en
Priority to DE19813148806 priority patent/DE3148806A1/en
Publication of JPS57152585A publication Critical patent/JPS57152585A/en
Publication of JPS6145319B2 publication Critical patent/JPS6145319B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To obtain a highly reliable nonvolatile semiconductor memory, by changing the comparison electric potential supplied to the differential type sense amplifier, in accordance with the change in the threshold voltage of the memory cell. CONSTITUTION:Memory cells arranged as a matrix, a differential type sense amplifier to which one side input signal is supplied from row lines, and a comparison electric potential generating circuit which supplies an electric power corresponding to the threshold voltage of the memory cell as another side input signal, are installed. Moreover, a control electric potential generating circuit which is coupled to the comparison electric potential generating circuit and which changes the output of the comparison electric potential generating circuit in accordance with the variation in the threshold voltage of the memory cell, is also installed. This control electric potential generating circuit is made, for example, as a circuit containing an MOS transistor Tr23 configured by connecting a control gate electrode 21 to a floating gate 19, which is controlled by the threshold voltage of the transistor Tr23, and whose output VR becomes lower when the threshold voltage Vth23 becomes higher and the output VR becomes normal one VR when the threshold voltage Vth23 becomes lower.
JP3635081A 1980-12-12 1981-03-13 Nonvolatile semiconductor memory Granted JPS57152585A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP3635081A JPS57152585A (en) 1981-03-13 1981-03-13 Nonvolatile semiconductor memory
GB8136789A GB2089612B (en) 1980-12-12 1981-12-07 Nonvolatile semiconductor memory device
US06/329,059 US4467457A (en) 1980-12-12 1981-12-09 Nonvolatile semiconductor memory device
DE19813148806 DE3148806A1 (en) 1980-12-12 1981-12-10 NON-VOLATILE SEMICONDUCTOR MEMORY

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3635081A JPS57152585A (en) 1981-03-13 1981-03-13 Nonvolatile semiconductor memory

Publications (2)

Publication Number Publication Date
JPS57152585A true JPS57152585A (en) 1982-09-20
JPS6145319B2 JPS6145319B2 (en) 1986-10-07

Family

ID=12467384

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3635081A Granted JPS57152585A (en) 1980-12-12 1981-03-13 Nonvolatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS57152585A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5998394A (en) * 1982-11-26 1984-06-06 Hitachi Ltd Semiconductor storage device
JPS60242596A (en) * 1984-02-21 1985-12-02 ウイリアム　ダブリユ−　イツプ Sensing amplifier for cmos eprom
KR100381352B1 (en) * 1997-07-07 2003-12-18 엔이씨 일렉트로닉스 코포레이션 Semiconductor non-volatile memory device having floating gate type reference cell short-circuited between control gate electrode and floating gate electrode

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8116159B2 (en) * 2005-03-30 2012-02-14 Ovonyx, Inc. Using a bit specific reference level to read a resistive memory

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5998394A (en) * 1982-11-26 1984-06-06 Hitachi Ltd Semiconductor storage device
JPS60242596A (en) * 1984-02-21 1985-12-02 ウイリアム　ダブリユ−　イツプ Sensing amplifier for cmos eprom
KR100381352B1 (en) * 1997-07-07 2003-12-18 엔이씨 일렉트로닉스 코포레이션 Semiconductor non-volatile memory device having floating gate type reference cell short-circuited between control gate electrode and floating gate electrode

Also Published As

Publication number Publication date
JPS6145319B2 (en) 1986-10-07

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