JPS57150028A - Telegram buffer control system - Google Patents

Telegram buffer control system

Info

Publication number
JPS57150028A
JPS57150028A JP56026550A JP2655081A JPS57150028A JP S57150028 A JPS57150028 A JP S57150028A JP 56026550 A JP56026550 A JP 56026550A JP 2655081 A JP2655081 A JP 2655081A JP S57150028 A JPS57150028 A JP S57150028A
Authority
JP
Japan
Prior art keywords
maps
unit
units
bit
control system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56026550A
Other languages
Japanese (ja)
Other versions
JPS6126684B2 (en
Inventor
Toshihiko Kaji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Facom Corp
Original Assignee
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Facom Corp filed Critical Fuji Facom Corp
Priority to JP56026550A priority Critical patent/JPS57150028A/en
Publication of JPS57150028A publication Critical patent/JPS57150028A/en
Publication of JPS6126684B2 publication Critical patent/JPS6126684B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Computer And Data Communications (AREA)

Abstract

PURPOSE:To decrease the processing time for the retrieval of a bit map and to increase the processing efficiency, by providing a control table to control and retrieve the bit map. CONSTITUTION:A buffer 9 of a file device 8 contains n units of the unit block, and a unit block includes m units of unit buffers b0-bm. A bit map 7 which controls the using condition of the buffer 9 comprises n units of maps A0-An, and these maps are provided in correspondence to unit blocks B0-Bn. A memory 3 contains a control table 4 that controls the map 7. The data (number of idle bit maps) showing the using condition of the unit bit maps is stored in each of regions A'0-A'n of the table 4. A working region 6 possesses a unit block.
JP56026550A 1981-02-25 1981-02-25 Telegram buffer control system Granted JPS57150028A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56026550A JPS57150028A (en) 1981-02-25 1981-02-25 Telegram buffer control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56026550A JPS57150028A (en) 1981-02-25 1981-02-25 Telegram buffer control system

Publications (2)

Publication Number Publication Date
JPS57150028A true JPS57150028A (en) 1982-09-16
JPS6126684B2 JPS6126684B2 (en) 1986-06-21

Family

ID=12196620

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56026550A Granted JPS57150028A (en) 1981-02-25 1981-02-25 Telegram buffer control system

Country Status (1)

Country Link
JP (1) JPS57150028A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164352A (en) * 1981-03-25 1982-10-08 Ibm Memory space allotment controller
JPH0314073A (en) * 1989-06-13 1991-01-22 Koufu Nippon Denki Kk Vector processing system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50123249A (en) * 1974-03-18 1975-09-27
JPS53116744A (en) * 1977-03-22 1978-10-12 Matsushita Electric Ind Co Ltd Recording system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50123249A (en) * 1974-03-18 1975-09-27
JPS53116744A (en) * 1977-03-22 1978-10-12 Matsushita Electric Ind Co Ltd Recording system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164352A (en) * 1981-03-25 1982-10-08 Ibm Memory space allotment controller
JPH0364890B2 (en) * 1981-03-25 1991-10-08 Intaanashonaru Bijinesu Mashiinzu Corp
JPH0314073A (en) * 1989-06-13 1991-01-22 Koufu Nippon Denki Kk Vector processing system

Also Published As

Publication number Publication date
JPS6126684B2 (en) 1986-06-21

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