JPS57138100A - Write margin measuring device - Google Patents

Write margin measuring device

Info

Publication number
JPS57138100A
JPS57138100A JP56023144A JP2314481A JPS57138100A JP S57138100 A JPS57138100 A JP S57138100A JP 56023144 A JP56023144 A JP 56023144A JP 2314481 A JP2314481 A JP 2314481A JP S57138100 A JPS57138100 A JP S57138100A
Authority
JP
Japan
Prior art keywords
write
prom20
block
prom
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56023144A
Other languages
Japanese (ja)
Other versions
JPS6249680B2 (en
Inventor
Kiyoshi Matsui
Kunio Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56023144A priority Critical patent/JPS57138100A/en
Publication of JPS57138100A publication Critical patent/JPS57138100A/en
Publication of JPS6249680B2 publication Critical patent/JPS6249680B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To improve the reliability of write-in to a PROM, by measuring the write margin of writable read only memory PROM through the change in systematically and arbitrarily. CONSTITUTION:If all the addresses of a PROM20 are not written, the prescribed write-in condition and write-in address are sequentially picked up from an internal memory 12 at each split block and written in the PROM20 under the specified condition via an input/output control circuit 13. When the write is finished, a processor 11 reads the write data to each address at each block of the PROM20, collates the data with data relating to the address stored in the memory 12 and calculates the rate of write. Next, the result of collation is displayed on a display 16 at each block, allowing to clarify the write rate per each block of the PROM20. Thus, the reliability of write of the PROM is improved.
JP56023144A 1981-02-20 1981-02-20 Write margin measuring device Granted JPS57138100A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56023144A JPS57138100A (en) 1981-02-20 1981-02-20 Write margin measuring device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56023144A JPS57138100A (en) 1981-02-20 1981-02-20 Write margin measuring device

Publications (2)

Publication Number Publication Date
JPS57138100A true JPS57138100A (en) 1982-08-26
JPS6249680B2 JPS6249680B2 (en) 1987-10-20

Family

ID=12102364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56023144A Granted JPS57138100A (en) 1981-02-20 1981-02-20 Write margin measuring device

Country Status (1)

Country Link
JP (1) JPS57138100A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7492660B2 (en) 1989-04-13 2009-02-17 Sandisk Corporation Flash EEprom system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7492660B2 (en) 1989-04-13 2009-02-17 Sandisk Corporation Flash EEprom system

Also Published As

Publication number Publication date
JPS6249680B2 (en) 1987-10-20

Similar Documents

Publication Publication Date Title
KR830006750A (en) Transaction processing device
KR880010375A (en) Portable Electronics
EP0051292A3 (en) Display device
KR890016567A (en) Information storage method and device
DE3579103D1 (en) VIDEO SIGNAL PROCESSING CIRCLES.
JPS57138100A (en) Write margin measuring device
JPS56169292A (en) Storage device
JPS55163697A (en) Memory device
JPS5613585A (en) Semiconductor memory circuit
JPS5774889A (en) Associative memory device
JPS57152038A (en) Arithmetic processing device
JPS5782298A (en) Diagnostic system for storage device
JPS55137789A (en) Subscriber information control system in telephone terminal
JPS57168304A (en) Arithmetic device
JPS5798197A (en) Multiplexing memory device
JPS6413125A (en) Multiphotometric device
JPS57111474A (en) Test system for memory printed board
JPS57209553A (en) Information processor
JPS6484341A (en) In-circuit emulator
JPS5774891A (en) Logical circuit
JPS5564690A (en) Error detection and correction system of semiconductor memory device
JPS56101155A (en) Central control device of copying machine
JPS56105546A (en) Memory mapping circuit
JPS5492150A (en) Gathering system for status information
FR2266221A1 (en) Data processor with real memory and central processing unit - has communication centre providing information identifying selected procedure