JPS57129046A - Frame synchronization protecting circuit - Google Patents

Frame synchronization protecting circuit

Info

Publication number
JPS57129046A
JPS57129046A JP56013927A JP1392781A JPS57129046A JP S57129046 A JPS57129046 A JP S57129046A JP 56013927 A JP56013927 A JP 56013927A JP 1392781 A JP1392781 A JP 1392781A JP S57129046 A JPS57129046 A JP S57129046A
Authority
JP
Japan
Prior art keywords
transistor
collector
circuit
voltage
comparing circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56013927A
Other languages
Japanese (ja)
Inventor
Masakazu Mori
Sadao Ifukuro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56013927A priority Critical patent/JPS57129046A/en
Publication of JPS57129046A publication Critical patent/JPS57129046A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To prevent out-of-frame by a simple circuit configuration, by using a current switching circuit, an RC time constant element, a limiter and a voltage comparing circuit. CONSTITUTION:A parallel circuit consisting of a resistance Rc and a capacitor C is provided on the collector of a transistor TR2 of a current switching circuit constituted of transistors TR1, TR2, and an output of the collector is provided to a negative (-) input terminal 30 of a voltage comparing circuit 33 through a limiter 26. When a burst error which is larger than reference voltage Vref applied to the base of the transistor TR2 is applied to the base of the transistor TR1, a collector current flows to the transistor TR2, and the capacitor C is charged. When the collector voltage of the transistor TR2 attains to threshold voltage of the voltage comparing circuit 33, a protecting output is generated from the voltage comparing circuit 33. In this case, even if the burst error annihilates, the protecting output is continued only for a period decided by a discharge time of an RC time constant element.
JP56013927A 1981-02-02 1981-02-02 Frame synchronization protecting circuit Pending JPS57129046A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56013927A JPS57129046A (en) 1981-02-02 1981-02-02 Frame synchronization protecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56013927A JPS57129046A (en) 1981-02-02 1981-02-02 Frame synchronization protecting circuit

Publications (1)

Publication Number Publication Date
JPS57129046A true JPS57129046A (en) 1982-08-10

Family

ID=11846809

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56013927A Pending JPS57129046A (en) 1981-02-02 1981-02-02 Frame synchronization protecting circuit

Country Status (1)

Country Link
JP (1) JPS57129046A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0654814U (en) * 1993-12-20 1994-07-26 佐二 萩原 Gassho framework

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012857A (en) * 1973-06-06 1975-02-10
JPS5399711A (en) * 1977-02-12 1978-08-31 Fujitsu Ltd Integrating-type protection circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012857A (en) * 1973-06-06 1975-02-10
JPS5399711A (en) * 1977-02-12 1978-08-31 Fujitsu Ltd Integrating-type protection circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0654814U (en) * 1993-12-20 1994-07-26 佐二 萩原 Gassho framework

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