JPS57117199A - Memory device possible for remote supervisory - Google Patents
Memory device possible for remote supervisoryInfo
- Publication number
- JPS57117199A JPS57117199A JP56003673A JP367381A JPS57117199A JP S57117199 A JPS57117199 A JP S57117199A JP 56003673 A JP56003673 A JP 56003673A JP 367381 A JP367381 A JP 367381A JP S57117199 A JPS57117199 A JP S57117199A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- circuit
- content
- written
- given
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1608—Error detection by comparing the output signals of redundant hardware
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To reduce the confirming time of existing memory without interrupting an actual operation, by comparing the same content written in each memory of in-use and spare use with the content of spare memory during actual operation of the in-use memory. CONSTITUTION:When address control signals 41-4n are given to designation circuits 21-2n, data are written in memories 11-1n. The memory 1i is succeedingly read out at the circuit 2i, and the read out data are given to a controller via a selection circuit 5 as an in-use output 8. In this case, when the write-in data to the memory 1i is also written in the memory 1j, the content of the memory 1j is also applied to the circuit 5 with the address designation, and the circuit 5 gives the content of the memory 1j as a reference output 52 to a discidence detection circuit 6 according to a signal 51. The circuit 6 compares outputs 8 and 52 in bit unit, and the discidence signal is given to monitor lines via an interface 7.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56003673A JPS57117199A (en) | 1981-01-12 | 1981-01-12 | Memory device possible for remote supervisory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56003673A JPS57117199A (en) | 1981-01-12 | 1981-01-12 | Memory device possible for remote supervisory |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57117199A true JPS57117199A (en) | 1982-07-21 |
Family
ID=11563936
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56003673A Pending JPS57117199A (en) | 1981-01-12 | 1981-01-12 | Memory device possible for remote supervisory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57117199A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6245266A (en) * | 1985-08-22 | 1987-02-27 | Matsushita Graphic Commun Syst Inc | Method for remote fault diagnosis and fault repair of communication terminal equipment |
-
1981
- 1981-01-12 JP JP56003673A patent/JPS57117199A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6245266A (en) * | 1985-08-22 | 1987-02-27 | Matsushita Graphic Commun Syst Inc | Method for remote fault diagnosis and fault repair of communication terminal equipment |
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