JPS57111751A - Reset controlling system of data processing device - Google Patents
Reset controlling system of data processing deviceInfo
- Publication number
- JPS57111751A JPS57111751A JP55187803A JP18780380A JPS57111751A JP S57111751 A JPS57111751 A JP S57111751A JP 55187803 A JP55187803 A JP 55187803A JP 18780380 A JP18780380 A JP 18780380A JP S57111751 A JPS57111751 A JP S57111751A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- processing device
- data processing
- reset
- main
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
Abstract
PURPOSE:To raise an operation by use of only one reset commanding means, by resetting the hardware when a prescribed time has passed after generating the first signal for resetting a program, and generating the second signal for starting a save main routine. CONSTITUTION:In case an error has occurred due to some cause, it is displayed on a data processing device 1 and its operation is stopped. When an operator depresses a switch 6 in this case, the first signal is generated, the data processing device 1 is interrupted, the software is reset, a save routine is started, and data of a self-instruction counter and a general register are saved in a main memory 2. On the other hand, the first signal is delayed by a delaying circuit in the switch 6, interrupts the data processing device 1 as the second signal, the hardware is reset, also starts a main save routine, saves a data of the main memory 2 in a non-volatile memory 5, and is inputted to the next program.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55187803A JPS57111751A (en) | 1980-12-29 | 1980-12-29 | Reset controlling system of data processing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55187803A JPS57111751A (en) | 1980-12-29 | 1980-12-29 | Reset controlling system of data processing device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57111751A true JPS57111751A (en) | 1982-07-12 |
Family
ID=16212502
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55187803A Pending JPS57111751A (en) | 1980-12-29 | 1980-12-29 | Reset controlling system of data processing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57111751A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6364442B1 (en) | 1997-10-16 | 2002-04-02 | Seiko Epson Corporation | Printing apparatus, and a control method for resetting the printing apparatus |
-
1980
- 1980-12-29 JP JP55187803A patent/JPS57111751A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6364442B1 (en) | 1997-10-16 | 2002-04-02 | Seiko Epson Corporation | Printing apparatus, and a control method for resetting the printing apparatus |
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