JPS5710873A - Instruction control device - Google Patents

Instruction control device

Info

Publication number
JPS5710873A
JPS5710873A JP8611180A JP8611180A JPS5710873A JP S5710873 A JPS5710873 A JP S5710873A JP 8611180 A JP8611180 A JP 8611180A JP 8611180 A JP8611180 A JP 8611180A JP S5710873 A JPS5710873 A JP S5710873A
Authority
JP
Japan
Prior art keywords
control
instruction
stage
operation control
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8611180A
Other languages
Japanese (ja)
Other versions
JPS6116113B2 (en
Inventor
Shigeaki Okuya
Tetsuo Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8611180A priority Critical patent/JPS5710873A/en
Publication of JPS5710873A publication Critical patent/JPS5710873A/en
Publication of JPS6116113B2 publication Critical patent/JPS6116113B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Abstract

PURPOSE:To execute a data processing efficiently, by constituting a device so that an operation control executing instruction is held by an operation control executing instruction holding means which has divided an operation control execution stage into plural parts, in accordance with a control signal from an operation processing means being of a pipeline structure. CONSTITUTION:In a data processing equipment for processing a vector instruction, an operation control execution stage in an instruction control device is divided into two by providing a setting circuit 7 for an ER stage, a register 8, a setting circuit 9 for an EW stage, a register 10, and decoders 11, 12. In accordance with a control signal from an operation processing part 14 being of a pipeline structure, an operation control executing instruction to each register 8, 10 is held. According to this constitution, since control of a write stage is started by an instruction from the operation processing part 14, the operation control is executed at a higher speed, and also an optimum data processing according to an actual control processing state is executed.
JP8611180A 1980-06-25 1980-06-25 Instruction control device Granted JPS5710873A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8611180A JPS5710873A (en) 1980-06-25 1980-06-25 Instruction control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8611180A JPS5710873A (en) 1980-06-25 1980-06-25 Instruction control device

Publications (2)

Publication Number Publication Date
JPS5710873A true JPS5710873A (en) 1982-01-20
JPS6116113B2 JPS6116113B2 (en) 1986-04-28

Family

ID=13877584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8611180A Granted JPS5710873A (en) 1980-06-25 1980-06-25 Instruction control device

Country Status (1)

Country Link
JP (1) JPS5710873A (en)

Also Published As

Publication number Publication date
JPS6116113B2 (en) 1986-04-28

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