JPS57106214A - Signal processing device for signal delay device - Google Patents

Signal processing device for signal delay device

Info

Publication number
JPS57106214A
JPS57106214A JP18315780A JP18315780A JPS57106214A JP S57106214 A JPS57106214 A JP S57106214A JP 18315780 A JP18315780 A JP 18315780A JP 18315780 A JP18315780 A JP 18315780A JP S57106214 A JPS57106214 A JP S57106214A
Authority
JP
Japan
Prior art keywords
charge coupling
signal
coupling element
elements
trs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18315780A
Other languages
Japanese (ja)
Inventor
Hideyuki Ikuhara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP18315780A priority Critical patent/JPS57106214A/en
Publication of JPS57106214A publication Critical patent/JPS57106214A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/26—Time-delay networks

Landscapes

  • Networks Using Active Elements (AREA)

Abstract

PURPOSE:To improve the sampling rate, by giving an input signal to plural signal delay elements in parallel and sampling the signal by pulses with phases shifted from one another. CONSTITUTION:An input signal (g) is inputted to a delay element consisting of charge coupling elements 24-27. Clock pulses (h)-(k) having 90 deg. phase difference are applied to charge coupling elements 24-27. An output (l) of the charge coupling element 24 is applied to the base of a transistor (TR)28 to control the current flowed to a differential amplifier consisting of TRs 30 and 31. The TR30 is turned on at the timing when the clock is inputted to the charge coupling element 24. As a result, the output of the charge coupling element 24 appears in the collector of the TR30. Similarly, outputs of charge coupling elements 25-27 appear in collectors of TRs 34, 38, and 42 respectively. These outputs are synthesized and outputted.
JP18315780A 1980-12-23 1980-12-23 Signal processing device for signal delay device Pending JPS57106214A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18315780A JPS57106214A (en) 1980-12-23 1980-12-23 Signal processing device for signal delay device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18315780A JPS57106214A (en) 1980-12-23 1980-12-23 Signal processing device for signal delay device

Publications (1)

Publication Number Publication Date
JPS57106214A true JPS57106214A (en) 1982-07-02

Family

ID=16130791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18315780A Pending JPS57106214A (en) 1980-12-23 1980-12-23 Signal processing device for signal delay device

Country Status (1)

Country Link
JP (1) JPS57106214A (en)

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