JPS57105048A - Reset control processing system of task - Google Patents

Reset control processing system of task

Info

Publication number
JPS57105048A
JPS57105048A JP18224680A JP18224680A JPS57105048A JP S57105048 A JPS57105048 A JP S57105048A JP 18224680 A JP18224680 A JP 18224680A JP 18224680 A JP18224680 A JP 18224680A JP S57105048 A JPS57105048 A JP S57105048A
Authority
JP
Japan
Prior art keywords
interruption
task
processing system
reset
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18224680A
Other languages
Japanese (ja)
Inventor
Giichi Hamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18224680A priority Critical patent/JPS57105048A/en
Publication of JPS57105048A publication Critical patent/JPS57105048A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To execute a check processing in a state that an interruption is permitted, by transferring the contents of a reset processing system save area to the corresponding task control system save area, before the reset point corresponding to the interruption. CONSTITUTION:Reset processing system save areas 6-0, 6-1 are provided so as to correspond to processing of a task prescribed in advance, and at every check point prescribed in advance on a program, status information containing a prograh status word is stored in the areas 6-0, 6-1. In case when the area 6-0 and 6-1 are provided on an interruption handler 5, relating to a processing task in case when an interruption has been generated, the contents of the area 6-0 and 6-1 are transferred to task control system save areas 4-0-4-P, before the reset point corresponding to the interruption.
JP18224680A 1980-12-23 1980-12-23 Reset control processing system of task Pending JPS57105048A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18224680A JPS57105048A (en) 1980-12-23 1980-12-23 Reset control processing system of task

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18224680A JPS57105048A (en) 1980-12-23 1980-12-23 Reset control processing system of task

Publications (1)

Publication Number Publication Date
JPS57105048A true JPS57105048A (en) 1982-06-30

Family

ID=16114895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18224680A Pending JPS57105048A (en) 1980-12-23 1980-12-23 Reset control processing system of task

Country Status (1)

Country Link
JP (1) JPS57105048A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59195749A (en) * 1983-03-14 1984-11-06 バロ−ス・コ−ポレ−シヨン Non-synchronous check pointing system for recovery of errors

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5528190A (en) * 1978-08-22 1980-02-28 Nippon Telegr & Teleph Corp <Ntt> Microprogram control system
JPS55146548A (en) * 1979-05-02 1980-11-14 Nec Corp Microprogram controlling unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5528190A (en) * 1978-08-22 1980-02-28 Nippon Telegr & Teleph Corp <Ntt> Microprogram control system
JPS55146548A (en) * 1979-05-02 1980-11-14 Nec Corp Microprogram controlling unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59195749A (en) * 1983-03-14 1984-11-06 バロ−ス・コ−ポレ−シヨン Non-synchronous check pointing system for recovery of errors

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