JPS57103191A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS57103191A JPS57103191A JP55180181A JP18018180A JPS57103191A JP S57103191 A JPS57103191 A JP S57103191A JP 55180181 A JP55180181 A JP 55180181A JP 18018180 A JP18018180 A JP 18018180A JP S57103191 A JPS57103191 A JP S57103191A
- Authority
- JP
- Japan
- Prior art keywords
- dummy
- cell capacity
- data lines
- cells
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4099—Dummy cell treatment; Reference voltage generators
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55180181A JPS57103191A (en) | 1980-12-19 | 1980-12-19 | Semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55180181A JPS57103191A (en) | 1980-12-19 | 1980-12-19 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57103191A true JPS57103191A (en) | 1982-06-26 |
Family
ID=16078796
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55180181A Pending JPS57103191A (en) | 1980-12-19 | 1980-12-19 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57103191A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5841719A (en) * | 1996-05-24 | 1998-11-24 | Nec Corporation | Data latching circuit for read-out operations of data from memory device |
JP2007136309A (ja) * | 2005-11-16 | 2007-06-07 | Mitsui Eng & Shipbuild Co Ltd | 横型ろ過装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57133590A (en) * | 1980-10-06 | 1982-08-18 | Inmos Corp | Mos memory |
-
1980
- 1980-12-19 JP JP55180181A patent/JPS57103191A/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57133590A (en) * | 1980-10-06 | 1982-08-18 | Inmos Corp | Mos memory |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5841719A (en) * | 1996-05-24 | 1998-11-24 | Nec Corporation | Data latching circuit for read-out operations of data from memory device |
JP2007136309A (ja) * | 2005-11-16 | 2007-06-07 | Mitsui Eng & Shipbuild Co Ltd | 横型ろ過装置 |
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