JPS5699503A - Sequence control circuit - Google Patents
Sequence control circuitInfo
- Publication number
- JPS5699503A JPS5699503A JP208680A JP208680A JPS5699503A JP S5699503 A JPS5699503 A JP S5699503A JP 208680 A JP208680 A JP 208680A JP 208680 A JP208680 A JP 208680A JP S5699503 A JPS5699503 A JP S5699503A
- Authority
- JP
- Japan
- Prior art keywords
- sequence control
- circuits
- control circuit
- order
- lines
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/08—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using plugboards, cross-bar distributors, matrix switches, or the like
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
Abstract
PURPOSE:To constitute a sequence control circuit which can be assembled, repaired and modified easily, by arraying in parallel plural FF circuits corresponding to one operation of the sequence control, and controlling them in due order. CONSTITUTION:The diode matrix is constituted of the respective output lines X1- X7 of the FF circuits (b)-(h) and the Y1-Y3 lines crossing said lines. Also, the pulse generators 4X, 4a-4c or the timers 9d-9h are connected to the set terminals of the respective FF circuits, respectively. At this time, when the switches 2, 3a-3c are operated in order, the FF circuits are turned on in order accordingly, or turned on, being delayed by a delay time by the timer. And, when the sequence control ends at last, a reset signal is provided to each FF circuit, and it is returned to its initial state. In this way, it is possible to constitute a sequence control circuit which can be increased and modified freely and also can be assembled and repaired easily.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP208680A JPS5699503A (en) | 1980-01-14 | 1980-01-14 | Sequence control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP208680A JPS5699503A (en) | 1980-01-14 | 1980-01-14 | Sequence control circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5699503A true JPS5699503A (en) | 1981-08-10 |
Family
ID=11519529
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP208680A Pending JPS5699503A (en) | 1980-01-14 | 1980-01-14 | Sequence control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5699503A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0277705U (en) * | 1988-12-02 | 1990-06-14 |
-
1980
- 1980-01-14 JP JP208680A patent/JPS5699503A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0277705U (en) * | 1988-12-02 | 1990-06-14 |
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