JPS5698786A - Memory access system - Google Patents

Memory access system

Info

Publication number
JPS5698786A
JPS5698786A JP17481780A JP17481780A JPS5698786A JP S5698786 A JPS5698786 A JP S5698786A JP 17481780 A JP17481780 A JP 17481780A JP 17481780 A JP17481780 A JP 17481780A JP S5698786 A JPS5698786 A JP S5698786A
Authority
JP
Japan
Prior art keywords
line
drive pulse
memory access
access system
coupled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17481780A
Other languages
English (en)
Other versions
JPS5733629B2 (ja
Inventor
Kei Hofuman Uiriamu
Wai Kao Arubaato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5698786A publication Critical patent/JPS5698786A/ja
Publication of JPS5733629B2 publication Critical patent/JPS5733629B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4085Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
JP17481780A 1972-06-30 1980-12-12 Memory access system Granted JPS5698786A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00267805A US3810124A (en) 1972-06-30 1972-06-30 Memory accessing system

Publications (2)

Publication Number Publication Date
JPS5698786A true JPS5698786A (en) 1981-08-08
JPS5733629B2 JPS5733629B2 (ja) 1982-07-17

Family

ID=23020194

Family Applications (2)

Application Number Title Priority Date Filing Date
JP6098273A Expired JPS5636513B2 (ja) 1972-06-30 1973-06-01
JP17481780A Granted JPS5698786A (en) 1972-06-30 1980-12-12 Memory access system

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP6098273A Expired JPS5636513B2 (ja) 1972-06-30 1973-06-01

Country Status (11)

Country Link
US (1) US3810124A (ja)
JP (2) JPS5636513B2 (ja)
CA (1) CA1028061A (ja)
CH (1) CH548084A (ja)
DD (1) DD104864A5 (ja)
ES (1) ES415975A1 (ja)
FR (1) FR2191202B1 (ja)
GB (1) GB1427156A (ja)
IT (1) IT983932B (ja)
NL (1) NL167789B (ja)
SU (1) SU654197A3 (ja)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5752669B2 (ja) * 1973-11-14 1982-11-09
FR2258783B1 (ja) * 1974-01-25 1977-09-16 Valentin Camille
GB1502270A (en) * 1974-10-30 1978-03-01 Hitachi Ltd Word line driver circuit in memory circuit
JPS51147224A (en) * 1975-06-13 1976-12-17 Hitachi Ltd Semiconductor memory
US4025908A (en) * 1975-06-24 1977-05-24 International Business Machines Corporation Dynamic array with clamped bootstrap static input/output circuitry
US4086662A (en) * 1975-11-07 1978-04-25 Hitachi, Ltd. Memory system with read/write control lines
JPS5827440Y2 (ja) * 1975-12-31 1983-06-14 富士通株式会社 ハンドウタイキオクカイロ
JPS5922316B2 (ja) * 1976-02-24 1984-05-25 株式会社東芝 ダイナミツクメモリ装置
US4074237A (en) * 1976-03-08 1978-02-14 International Business Machines Corporation Word line clamping circuit and decoder
JPS52155928A (en) * 1976-06-21 1977-12-24 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
US4188671A (en) * 1977-01-24 1980-02-12 Bell Telephone Laboratories, Incorporated Switched-capacitor memory
JPS544086A (en) * 1977-06-10 1979-01-12 Fujitsu Ltd Memory circuit unit
JPS55150189A (en) * 1979-05-10 1980-11-21 Nec Corp Memory circuit
JPS5847796B2 (ja) * 1979-05-26 1983-10-25 富士通株式会社 半導体メモリ装置
JPS5619585A (en) * 1979-07-26 1981-02-24 Toshiba Corp Semiconductor memory unit
US4357687A (en) * 1980-12-11 1982-11-02 Fairchild Camera And Instr. Corp. Adaptive word line pull down
JPS57212690A (en) * 1981-06-24 1982-12-27 Hitachi Ltd Dynamic mos memory device
JPS58153294A (ja) * 1982-03-04 1983-09-12 Mitsubishi Electric Corp 半導体記憶装置
JPS5948890A (ja) * 1982-09-10 1984-03-21 Nec Corp メモリ回路
JPS5960794A (ja) * 1982-09-29 1984-04-06 Fujitsu Ltd ダイナミツク型半導体記憶装置
JPS59116985A (ja) * 1982-11-29 1984-07-06 Fujitsu Ltd 半導体記憶装置
JPS6168865U (ja) * 1984-10-09 1986-05-12
JPH07105140B2 (ja) * 1988-12-16 1995-11-13 日本電気株式会社 半導体メモリ
EP0953983A3 (en) * 1996-03-01 2005-10-05 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device with clamping circuit for preventing malfunction
EP0793176B1 (en) * 1996-03-01 1999-06-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device capable of preventing malfunction due to disconnection of word select line
DE19823956A1 (de) * 1998-05-28 1999-12-02 Siemens Ag Anordnung zur Übersprechdämpfung in Wortleitungen von DRAM-Schaltungen
US20070165479A1 (en) * 2006-01-17 2007-07-19 Norbert Rehm Local wordline driver scheme to avoid fails due to floating wordline in a segmented wordline driver scheme

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1549076A1 (de) * 1967-12-22 1971-01-21 Standard Elek K Lorenz Ag Assoziativer Speicher
US3699537A (en) * 1969-05-16 1972-10-17 Shell Oil Co Single-rail mosfet memory with capacitive storage
US3706978A (en) * 1971-11-11 1972-12-19 Ibm Functional storage array

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ELECTRONIC=1967 *

Also Published As

Publication number Publication date
ES415975A1 (es) 1976-05-16
SU654197A3 (ru) 1979-03-25
DE2324300B2 (de) 1976-06-16
US3810124A (en) 1974-05-07
NL7308695A (ja) 1974-01-02
FR2191202A1 (ja) 1974-02-01
CH548084A (de) 1974-04-11
JPS5636513B2 (ja) 1981-08-25
FR2191202B1 (ja) 1976-05-28
NL167789B (nl) 1981-08-17
JPS4945649A (ja) 1974-05-01
CA1028061A (en) 1978-03-14
DE2324300A1 (de) 1974-01-17
GB1427156A (en) 1976-03-10
DD104864A5 (ja) 1974-03-20
JPS5733629B2 (ja) 1982-07-17
IT983932B (it) 1974-11-11

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