JPS5696563A - Modulation method for digital signal - Google Patents

Modulation method for digital signal

Info

Publication number
JPS5696563A
JPS5696563A JP6131880A JP6131880A JPS5696563A JP S5696563 A JPS5696563 A JP S5696563A JP 6131880 A JP6131880 A JP 6131880A JP 6131880 A JP6131880 A JP 6131880A JP S5696563 A JPS5696563 A JP S5696563A
Authority
JP
Japan
Prior art keywords
fed
output
gate
signal
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6131880A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6362826B2 (enrdf_load_stackoverflow
Inventor
Yoji Sugiura
Masaru Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP6131880A priority Critical patent/JPS5696563A/ja
Publication of JPS5696563A publication Critical patent/JPS5696563A/ja
Publication of JPS6362826B2 publication Critical patent/JPS6362826B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Dc Digital Transmission (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP6131880A 1980-05-08 1980-05-08 Modulation method for digital signal Granted JPS5696563A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6131880A JPS5696563A (en) 1980-05-08 1980-05-08 Modulation method for digital signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6131880A JPS5696563A (en) 1980-05-08 1980-05-08 Modulation method for digital signal

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP296679A Division JPS5597622A (en) 1979-01-17 1979-01-17 Warming-up device for engine control unit

Publications (2)

Publication Number Publication Date
JPS5696563A true JPS5696563A (en) 1981-08-04
JPS6362826B2 JPS6362826B2 (enrdf_load_stackoverflow) 1988-12-05

Family

ID=13167674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6131880A Granted JPS5696563A (en) 1980-05-08 1980-05-08 Modulation method for digital signal

Country Status (1)

Country Link
JP (1) JPS5696563A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59138155A (ja) * 1983-01-26 1984-08-08 Sony Corp デイジタル信号伝送方法
JPH05151717A (ja) * 1992-05-18 1993-06-18 Sony Corp 同期方式
US7706231B2 (en) 2002-09-09 2010-04-27 Sony Corporation Read-only recording medium, reproduction apparatus and reproduction method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0235123U (enrdf_load_stackoverflow) * 1988-08-31 1990-03-07

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59138155A (ja) * 1983-01-26 1984-08-08 Sony Corp デイジタル信号伝送方法
JPH05151717A (ja) * 1992-05-18 1993-06-18 Sony Corp 同期方式
US7706231B2 (en) 2002-09-09 2010-04-27 Sony Corporation Read-only recording medium, reproduction apparatus and reproduction method

Also Published As

Publication number Publication date
JPS6362826B2 (enrdf_load_stackoverflow) 1988-12-05

Similar Documents

Publication Publication Date Title
US4017803A (en) Data recovery system resistant to frequency deviations
ES450960A1 (es) Perfeccionamientos en circuitos de recuperacion de tempori- zacion para datos digitales.
US4617526A (en) Sync responsive clock generator for digital demodulators
JPS5696563A (en) Modulation method for digital signal
EP0240232A3 (en) Digital phase lock loop
EP0741931A1 (en) Phase-locked loop, phase comparator for use in the phase-locked loop, and reproducing device including the phase-locked loop
GB1265530A (enrdf_load_stackoverflow)
JPS576415A (en) Digital signal recording and reproducing device
JPS56115280A (en) Thermal head driving circuit for facsimile apparatus
GB1312550A (en) System for the transmission of information at very low signal- to-noise ratios
JPS576423A (en) Demodulating circuit of mfm modulation signal
GB1430212A (en) High speed data separator
JPS564956A (en) Timing extracting circuit
JPS5748849A (en) Digital phase modulator
JPS5781752A (en) Demodulating circuit for transmission system of same direction data
GB1505515A (en) Clock pulse compensation circuit
KR860002165Y1 (ko) Mfm 디지탈 변조 회로
JPS5546659A (en) Data information reproduction system
JPS55149554A (en) Carrier reproducing circuit
DK14684A (da) Faselaast sloejfe med dc-modulationsevne
SU515143A1 (ru) Устройство дл магнитной записи цифровой информации
JPS5772441A (en) Bit synchronizing circuit
KR860002166Y1 (ko) Mfm 디지탈 복조회로
JPS5483354A (en) Data reproduction circuit
GB1368419A (en) Crystal controlled frequency discriminator