JPS5696563A - Modulation method for digital signal - Google Patents

Modulation method for digital signal

Info

Publication number
JPS5696563A
JPS5696563A JP6131880A JP6131880A JPS5696563A JP S5696563 A JPS5696563 A JP S5696563A JP 6131880 A JP6131880 A JP 6131880A JP 6131880 A JP6131880 A JP 6131880A JP S5696563 A JPS5696563 A JP S5696563A
Authority
JP
Japan
Prior art keywords
fed
output
gate
signal
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6131880A
Other languages
Japanese (ja)
Other versions
JPS6362826B2 (en
Inventor
Yoji Sugiura
Masaru Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP6131880A priority Critical patent/JPS5696563A/en
Publication of JPS5696563A publication Critical patent/JPS5696563A/en
Publication of JPS6362826B2 publication Critical patent/JPS6362826B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To ensure the distinction of data from control signal at demodulation and to simplify the circuit constitution, by making different the signal inversion interval based on the frame synchronizing signal from that based on data. CONSTITUTION:Data DA1 in NRZ is fed to a terminal T1, readout clock CK1 of DA1 is to the terminal T2 and CK2 frequency dividing CK1 is fed to the terminal T3. CK1 and CK2 are fed to the circuit 10 to form CK3, CK4 having the same period and shifted by semiperiod for the phase. Further, DA1 is fed to D-FF11, it is latched with CK4, and the signal inverting 12 the output Q and the signal CK3 inverting 13 DA1 are fed to an AND gate 14, and CK3 is output from the gate 14 when DA1 is at 0 level continuously two periods or more for CK1. Further, CK4 is output from the gate 15 when DA1 is at 1 level. Thus, the clock output from an OR gate 16 is frequency-divided at FF17 to obtain the self clocking information in MFM modulation from the output Q.
JP6131880A 1980-05-08 1980-05-08 Modulation method for digital signal Granted JPS5696563A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6131880A JPS5696563A (en) 1980-05-08 1980-05-08 Modulation method for digital signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6131880A JPS5696563A (en) 1980-05-08 1980-05-08 Modulation method for digital signal

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP296679A Division JPS5597622A (en) 1979-01-17 1979-01-17 Warming-up device for engine control unit

Publications (2)

Publication Number Publication Date
JPS5696563A true JPS5696563A (en) 1981-08-04
JPS6362826B2 JPS6362826B2 (en) 1988-12-05

Family

ID=13167674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6131880A Granted JPS5696563A (en) 1980-05-08 1980-05-08 Modulation method for digital signal

Country Status (1)

Country Link
JP (1) JPS5696563A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59138155A (en) * 1983-01-26 1984-08-08 Sony Corp Method for transmitting digital signal
JPH05151717A (en) * 1992-05-18 1993-06-18 Sony Corp Synchronization system
US7706231B2 (en) 2002-09-09 2010-04-27 Sony Corporation Read-only recording medium, reproduction apparatus and reproduction method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0235123U (en) * 1988-08-31 1990-03-07

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59138155A (en) * 1983-01-26 1984-08-08 Sony Corp Method for transmitting digital signal
JPH0145788B2 (en) * 1983-01-26 1989-10-04 Sonii Kk
JPH05151717A (en) * 1992-05-18 1993-06-18 Sony Corp Synchronization system
JP2580432B2 (en) * 1992-05-18 1997-02-12 ソニー株式会社 Synchronization method
US7706231B2 (en) 2002-09-09 2010-04-27 Sony Corporation Read-only recording medium, reproduction apparatus and reproduction method

Also Published As

Publication number Publication date
JPS6362826B2 (en) 1988-12-05

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