JPS5772441A - Bit synchronizing circuit - Google Patents

Bit synchronizing circuit

Info

Publication number
JPS5772441A
JPS5772441A JP55148922A JP14892280A JPS5772441A JP S5772441 A JPS5772441 A JP S5772441A JP 55148922 A JP55148922 A JP 55148922A JP 14892280 A JP14892280 A JP 14892280A JP S5772441 A JPS5772441 A JP S5772441A
Authority
JP
Japan
Prior art keywords
output
input data
lpf11
clock
vco12
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55148922A
Other languages
Japanese (ja)
Inventor
Akira Hiroo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55148922A priority Critical patent/JPS5772441A/en
Publication of JPS5772441A publication Critical patent/JPS5772441A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To simplify a circuit constitution, by utilizing an analogue voltage controlled oscillator in the circuits formed with digital logical operation circuits entirely. CONSTITUTION:An NRZ input data 1 is delayed in an n-stage shift register 8 by 1/2 bit synchronously with the speed of a clock generated by a voltage controlled oscillator VCO12, and input data 1 and delayed data are inputted to an exclusive OR circuit 9, and pulses 14 of the 1/2 bit are generated at change points of input data 1 to the output. The output of pulses 14 has the phase detected with a reproducing synchronizing clock 7 by an exclusive OR circuit 10 to obtain a phase detection output 15. The output 15 has higher harmonic components eliminated by an LPF11 and is inputted to the VCO12. The oscillation frequency of the VCO12 is controlled by the output of the LPF11; and if the reproducing clock 7 advances more than input data 1, the output voltage of the LPF11 becomes lower to make the frequency lower. If the reproducing clock 7 is later than input data 1, the output voltage of the LPF11 becomes higher to make the frequency higher, thus obtaining synchronizing clocks.
JP55148922A 1980-10-23 1980-10-23 Bit synchronizing circuit Pending JPS5772441A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55148922A JPS5772441A (en) 1980-10-23 1980-10-23 Bit synchronizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55148922A JPS5772441A (en) 1980-10-23 1980-10-23 Bit synchronizing circuit

Publications (1)

Publication Number Publication Date
JPS5772441A true JPS5772441A (en) 1982-05-06

Family

ID=15463654

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55148922A Pending JPS5772441A (en) 1980-10-23 1980-10-23 Bit synchronizing circuit

Country Status (1)

Country Link
JP (1) JPS5772441A (en)

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