JPS5692650A - Memory bus monitor circuit - Google Patents

Memory bus monitor circuit

Info

Publication number
JPS5692650A
JPS5692650A JP16904679A JP16904679A JPS5692650A JP S5692650 A JPS5692650 A JP S5692650A JP 16904679 A JP16904679 A JP 16904679A JP 16904679 A JP16904679 A JP 16904679A JP S5692650 A JPS5692650 A JP S5692650A
Authority
JP
Japan
Prior art keywords
signal
data
bit
coincidence
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16904679A
Other languages
Japanese (ja)
Inventor
Hidekiyo Ozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16904679A priority Critical patent/JPS5692650A/en
Publication of JPS5692650A publication Critical patent/JPS5692650A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To efficiently investigate the causes to the malfunction of computer due to program error, by monitoring the transfer data on the memory bus and comparing the transfer direction of the signal with the address signal.
CONSTITUTION: The address signal transferred to the memory 1 through the memory bus l1 is compared with the content of the address register AR at the address comparison circuit C2. The data signal read out or written in from the memory 1 is compared with the content of the data register DR in bit correspondence at gates E1WEn, and the coincidence signal output of each bit is selected for the comparison objective bit with the output of the selection register SR at gates A1WAn. The transfer direction comparison circuit C1 detects the data transfer direction of the bus l1 and the transfer timing, compares it with the data transfer direction selected with the mode set register MR, and the output signal at coincidence is fed to the gate A12. When the output of the circuits C1, C2 and the comparison objective bit compared every bit are in coincidence at the gate A12, the data coincidence signal l3 is fed to CPU, and the operation of CPU is stopped.
COPYRIGHT: (C)1981,JPO&Japio
JP16904679A 1979-12-25 1979-12-25 Memory bus monitor circuit Pending JPS5692650A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16904679A JPS5692650A (en) 1979-12-25 1979-12-25 Memory bus monitor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16904679A JPS5692650A (en) 1979-12-25 1979-12-25 Memory bus monitor circuit

Publications (1)

Publication Number Publication Date
JPS5692650A true JPS5692650A (en) 1981-07-27

Family

ID=15879310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16904679A Pending JPS5692650A (en) 1979-12-25 1979-12-25 Memory bus monitor circuit

Country Status (1)

Country Link
JP (1) JPS5692650A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6178349U (en) * 1984-10-25 1986-05-26
US7913030B2 (en) 2007-12-28 2011-03-22 Sandisk Il Ltd. Storage device with transaction logging capability
US7979662B2 (en) 2007-12-28 2011-07-12 Sandisk Il Ltd. Storage device with transaction indexing capability

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4944645A (en) * 1972-08-30 1974-04-26
JPS5050839A (en) * 1973-09-05 1975-05-07
JPS54131844A (en) * 1978-04-04 1979-10-13 Toshiba Corp Electronic computer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4944645A (en) * 1972-08-30 1974-04-26
JPS5050839A (en) * 1973-09-05 1975-05-07
JPS54131844A (en) * 1978-04-04 1979-10-13 Toshiba Corp Electronic computer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6178349U (en) * 1984-10-25 1986-05-26
US7913030B2 (en) 2007-12-28 2011-03-22 Sandisk Il Ltd. Storage device with transaction logging capability
US7979662B2 (en) 2007-12-28 2011-07-12 Sandisk Il Ltd. Storage device with transaction indexing capability

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