JPS5691450A - Transistor - Google Patents

Transistor

Info

Publication number
JPS5691450A
JPS5691450A JP16866779A JP16866779A JPS5691450A JP S5691450 A JPS5691450 A JP S5691450A JP 16866779 A JP16866779 A JP 16866779A JP 16866779 A JP16866779 A JP 16866779A JP S5691450 A JPS5691450 A JP S5691450A
Authority
JP
Japan
Prior art keywords
transistor
series resistance
metallizing
pellet
abnormal oscillation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16866779A
Other languages
English (en)
Japanese (ja)
Other versions
JPS641936B2 (https=
Inventor
Yoshiaki Matsumae
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16866779A priority Critical patent/JPS5691450A/ja
Publication of JPS5691450A publication Critical patent/JPS5691450A/ja
Publication of JPS641936B2 publication Critical patent/JPS641936B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00Electrical arrangements for controlling or matching impedance
    • H10W44/20Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00Electrical arrangements for controlling or matching impedance
    • H10W44/20Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • H10W44/226Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for HF amplifiers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07541Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5445Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Bipolar Transistors (AREA)
  • Amplifiers (AREA)
JP16866779A 1979-12-25 1979-12-25 Transistor Granted JPS5691450A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16866779A JPS5691450A (en) 1979-12-25 1979-12-25 Transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16866779A JPS5691450A (en) 1979-12-25 1979-12-25 Transistor

Publications (2)

Publication Number Publication Date
JPS5691450A true JPS5691450A (en) 1981-07-24
JPS641936B2 JPS641936B2 (https=) 1989-01-13

Family

ID=15872259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16866779A Granted JPS5691450A (en) 1979-12-25 1979-12-25 Transistor

Country Status (1)

Country Link
JP (1) JPS5691450A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3066683A4 (en) * 2013-11-07 2017-11-15 NXP USA, Inc. Adjustable losses of bond wire arrangement

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5050847A (https=) * 1973-09-05 1975-05-07
JPS5435856U (https=) * 1977-08-15 1979-03-08

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5050847A (https=) * 1973-09-05 1975-05-07
JPS5435856U (https=) * 1977-08-15 1979-03-08

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3066683A4 (en) * 2013-11-07 2017-11-15 NXP USA, Inc. Adjustable losses of bond wire arrangement
US9979388B2 (en) 2013-11-07 2018-05-22 Nxp Usa, Inc. Adjustable losses of bond wire arrangement

Also Published As

Publication number Publication date
JPS641936B2 (https=) 1989-01-13

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