JPS5690407A - Encoding circuit - Google Patents

Encoding circuit

Info

Publication number
JPS5690407A
JPS5690407A JP16466579A JP16466579A JPS5690407A JP S5690407 A JPS5690407 A JP S5690407A JP 16466579 A JP16466579 A JP 16466579A JP 16466579 A JP16466579 A JP 16466579A JP S5690407 A JPS5690407 A JP S5690407A
Authority
JP
Japan
Prior art keywords
bit
conversion
inversion
suppress
data signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16466579A
Other languages
Japanese (ja)
Other versions
JPH0250549B2 (en
Inventor
Jun Yonemitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP16466579A priority Critical patent/JPS5690407A/en
Publication of JPS5690407A publication Critical patent/JPS5690407A/en
Publication of JPH0250549B2 publication Critical patent/JPH0250549B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE: To perform the conversion operation surely according to the conversion rule, by preventing inversion of the logical value of the bit in the last bit by the suppress signal corresponding to the last bit indicating one logical value in a prescribed sequence.
CONSTITUTION: In respect to data signal DT output from data signal generator DTG on a basis of two-phase clock signals ϕ1 and ϕ2 from clock signal generator CKG, conversion to the M2 code is performed by encoding circuit ENC. The inversion operation in the bit boundary in the encoding operation, the inversion operation in the bit boundary, and the inversion operation control in the bit center are performed independently of one another at the timing of each fall of two-phase clock signals ϕ1 and ϕ2 which have phases shifted by 180°. Thus, AND output signal Gs from AND gate circuit 9, namely, the suppress signal is used to suppress the inversion operation in the bit center corresponding to the last bit of the sequence, and the conversion operation to the M2 code is performed accurately in respect to data signal DT.
COPYRIGHT: (C)1981,JPO&Japio
JP16466579A 1979-12-20 1979-12-20 Encoding circuit Granted JPS5690407A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16466579A JPS5690407A (en) 1979-12-20 1979-12-20 Encoding circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16466579A JPS5690407A (en) 1979-12-20 1979-12-20 Encoding circuit

Publications (2)

Publication Number Publication Date
JPS5690407A true JPS5690407A (en) 1981-07-22
JPH0250549B2 JPH0250549B2 (en) 1990-11-02

Family

ID=15797485

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16466579A Granted JPS5690407A (en) 1979-12-20 1979-12-20 Encoding circuit

Country Status (1)

Country Link
JP (1) JPS5690407A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985000067A1 (en) * 1983-06-17 1985-01-03 Sony Corporation Method of modulating digital data

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102585051B1 (en) 2018-05-08 2023-10-04 그리 가부시키가이샤 Moving picture delivery system for delivering moving picture including animation of character object generated based on motions of actor, moving picture delivery method, and moving picture delivery program
US11044535B2 (en) 2018-08-28 2021-06-22 Gree, Inc. Video distribution system for live distributing video containing animation of character object generated based on motion of distributor user, distribution method, and storage medium storing video distribution program

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52114206A (en) * 1976-03-19 1977-09-24 Ampex Method and device for transmitting binary data

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52114206A (en) * 1976-03-19 1977-09-24 Ampex Method and device for transmitting binary data

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985000067A1 (en) * 1983-06-17 1985-01-03 Sony Corporation Method of modulating digital data

Also Published As

Publication number Publication date
JPH0250549B2 (en) 1990-11-02

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