JPS5687283A - Control system of conversion index buffer - Google Patents
Control system of conversion index bufferInfo
- Publication number
- JPS5687283A JPS5687283A JP16445779A JP16445779A JPS5687283A JP S5687283 A JPS5687283 A JP S5687283A JP 16445779 A JP16445779 A JP 16445779A JP 16445779 A JP16445779 A JP 16445779A JP S5687283 A JPS5687283 A JP S5687283A
- Authority
- JP
- Japan
- Prior art keywords
- region
- tlb
- address
- contents
- voluntary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To reduce greatly the number of occurrence of faults of a conversion index buffer (TLB), by dividing the TLB region into a voluntary region and a free region for register of the address pair and putting the pages having many using times into the voluntary region.
CONSTITUTION: When a TLB fault is detected by the TLB fault detecting circuit TF, a new pair of logic and real addresses is informed to the division control circuit DDC from the logic address set as the conversion subject by the dynamic address conversion mechanism DAT and in reference to the table. In case the registered address is the one in the space common region for OS, the contents of the voluntary regions mpWm1 of the TLB are shifted ESH successively toward the point l of division. Then the contents of the region m1 is erased, at the same time registering the new address pair in the region mp. While if the registered address is not in the space common region, the contents of the free regions npWn1 are shifted successively toward the point l. And the contents of the region n1 is erased, at the same time registering the new address pair into the region np.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16445779A JPS5687283A (en) | 1979-12-18 | 1979-12-18 | Control system of conversion index buffer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16445779A JPS5687283A (en) | 1979-12-18 | 1979-12-18 | Control system of conversion index buffer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5687283A true JPS5687283A (en) | 1981-07-15 |
Family
ID=15793533
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16445779A Pending JPS5687283A (en) | 1979-12-18 | 1979-12-18 | Control system of conversion index buffer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5687283A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63254544A (en) * | 1987-04-10 | 1988-10-21 | Nippon Telegr & Teleph Corp <Ntt> | Control system for address conversion |
-
1979
- 1979-12-18 JP JP16445779A patent/JPS5687283A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63254544A (en) * | 1987-04-10 | 1988-10-21 | Nippon Telegr & Teleph Corp <Ntt> | Control system for address conversion |
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