JPS5680724A - Dma control system of data processing system - Google Patents
Dma control system of data processing systemInfo
- Publication number
- JPS5680724A JPS5680724A JP15864179A JP15864179A JPS5680724A JP S5680724 A JPS5680724 A JP S5680724A JP 15864179 A JP15864179 A JP 15864179A JP 15864179 A JP15864179 A JP 15864179A JP S5680724 A JPS5680724 A JP S5680724A
- Authority
- JP
- Japan
- Prior art keywords
- line adapters
- dma control
- dma
- length information
- main memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Bus Control (AREA)
- Computer And Data Communications (AREA)
Abstract
PURPOSE: To suppress an increase in the number of interface lines and the complication of hardware constitution, by holding address information and length information for DMA control on an MPU unit corresponding to respective line adapters.
CONSTITUTION: In main memory 3 of MPU unit 1 connecting with plural line adapters, data buffer areas 8-0W8-7 are set up corresponding to respective line adapters. The contents of main memory address storage part 9 are sectioned corresponding to the line adapters and DMA address information used when corresponding line adapters perform data transmission under DMA control is stored. Length information storage part 10 is similarly sectioned and stored with length information on the number of transfer bytes. After DMA request signal MDRQ is received and confirmation signal MDAK is sent back, data are transferred between data buffer areas and corresponding line adapters.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54158641A JPS5931088B2 (en) | 1979-12-06 | 1979-12-06 | DMA control method of data processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54158641A JPS5931088B2 (en) | 1979-12-06 | 1979-12-06 | DMA control method of data processing system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5680724A true JPS5680724A (en) | 1981-07-02 |
JPS5931088B2 JPS5931088B2 (en) | 1984-07-31 |
Family
ID=15676143
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54158641A Expired JPS5931088B2 (en) | 1979-12-06 | 1979-12-06 | DMA control method of data processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5931088B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58147047U (en) * | 1982-03-24 | 1983-10-03 | オムロン株式会社 | data transmission equipment |
-
1979
- 1979-12-06 JP JP54158641A patent/JPS5931088B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58147047U (en) * | 1982-03-24 | 1983-10-03 | オムロン株式会社 | data transmission equipment |
Also Published As
Publication number | Publication date |
---|---|
JPS5931088B2 (en) | 1984-07-31 |
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