JPS5671335A - Pulse output method - Google Patents

Pulse output method

Info

Publication number
JPS5671335A
JPS5671335A JP14709479A JP14709479A JPS5671335A JP S5671335 A JPS5671335 A JP S5671335A JP 14709479 A JP14709479 A JP 14709479A JP 14709479 A JP14709479 A JP 14709479A JP S5671335 A JPS5671335 A JP S5671335A
Authority
JP
Japan
Prior art keywords
output
register
cpu7
time
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14709479A
Other languages
Japanese (ja)
Other versions
JPS646568B2 (en
Inventor
Katsunori Oshiage
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissan Motor Co Ltd
Original Assignee
Nissan Motor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissan Motor Co Ltd filed Critical Nissan Motor Co Ltd
Priority to JP14709479A priority Critical patent/JPS5671335A/en
Publication of JPS5671335A publication Critical patent/JPS5671335A/en
Publication of JPS646568B2 publication Critical patent/JPS646568B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K21/00Details of pulse counters or frequency dividers

Landscapes

  • Manipulation Of Pulses (AREA)
  • Control Of Stepping Motors (AREA)

Abstract

PURPOSE:To enable to output a plurality of arbitrary pulses, by representing time with free running counter FRC, sequentially setting the time to change the output to a compared register and comparing the set and counter values. CONSTITUTION:When an event is taken place, interruption is made to CPU7 of microcomputer, and the count value of a free running counter FRC 5 at that time point is read in. Simultaneously, the output S10 of an output port 8 is inverted. In a CPU7, the value corresponding to desired pulse width is added to the value read in and the result of operation is written in a comparison register 6 as a signal 8. The output of FRC 5 is increased, as time is elapsed and when it reaches the written-in value to the register 6, the register 6 outputs a signal S9 to interrupt the CPU7 and to invert the output S10. Accordingly, the output S10 is risen with the pulse S1 and has fall at the desired pulse width. By repeating this, when the output line of the port 8 is switched every occasion, a plurality of pulses can be picked up from a plurality of output lines.
JP14709479A 1979-11-15 1979-11-15 Pulse output method Granted JPS5671335A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14709479A JPS5671335A (en) 1979-11-15 1979-11-15 Pulse output method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14709479A JPS5671335A (en) 1979-11-15 1979-11-15 Pulse output method

Publications (2)

Publication Number Publication Date
JPS5671335A true JPS5671335A (en) 1981-06-13
JPS646568B2 JPS646568B2 (en) 1989-02-03

Family

ID=15422335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14709479A Granted JPS5671335A (en) 1979-11-15 1979-11-15 Pulse output method

Country Status (1)

Country Link
JP (1) JPS5671335A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58195323A (en) * 1982-05-10 1983-11-14 Matsushita Electric Ind Co Ltd Pulse generator
JPS6490617A (en) * 1987-09-30 1989-04-07 Nec Corp Pulse output device
JPH01130615A (en) * 1987-11-17 1989-05-23 Nec Corp Pulse output device
JP2012531837A (en) * 2009-06-26 2012-12-10 クゥアルコム・インコーポレイテッド Predetermined duty cycle signal generator

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5227650U (en) * 1975-08-19 1977-02-26
JPS5457003A (en) * 1977-10-17 1979-05-08 Hitachi Ltd Electronic engine control system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5227650U (en) * 1975-08-19 1977-02-26
JPS5457003A (en) * 1977-10-17 1979-05-08 Hitachi Ltd Electronic engine control system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58195323A (en) * 1982-05-10 1983-11-14 Matsushita Electric Ind Co Ltd Pulse generator
JPS6490617A (en) * 1987-09-30 1989-04-07 Nec Corp Pulse output device
JPH01130615A (en) * 1987-11-17 1989-05-23 Nec Corp Pulse output device
JP2012531837A (en) * 2009-06-26 2012-12-10 クゥアルコム・インコーポレイテッド Predetermined duty cycle signal generator

Also Published As

Publication number Publication date
JPS646568B2 (en) 1989-02-03

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