JPS5669957A - Pulse receiving circuit - Google Patents

Pulse receiving circuit

Info

Publication number
JPS5669957A
JPS5669957A JP14550879A JP14550879A JPS5669957A JP S5669957 A JPS5669957 A JP S5669957A JP 14550879 A JP14550879 A JP 14550879A JP 14550879 A JP14550879 A JP 14550879A JP S5669957 A JPS5669957 A JP S5669957A
Authority
JP
Japan
Prior art keywords
circuit
signal
voltage
atc
received pulses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14550879A
Other languages
Japanese (ja)
Other versions
JPS5920219B2 (en
Inventor
Hiroshi Nishinaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Fuji Facom Corp
Original Assignee
Fuji Electric Co Ltd
Fuji Facom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Facom Corp filed Critical Fuji Electric Co Ltd
Priority to JP14550879A priority Critical patent/JPS5920219B2/en
Publication of JPS5669957A publication Critical patent/JPS5669957A/en
Publication of JPS5920219B2 publication Critical patent/JPS5920219B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/062—Setting decision thresholds using feedforward techniques only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To eliminate an influence of level fluctuations due to variation in transmission distance and a reflected vibrating wave, by using the signal, obtained by holding the detection output of received pulses for some time, as a reference signal for an on-off discrimination as to received pulses. CONSTITUTION:An input signal from receiving buffer amplifier 3 is waveform- compensated and amplified by circuit 4 and then compared with ATC voltage 6' from ATC voltage setting circuit 6 by shaping circuit 5 to discriminate between on and off states. Received pulses are detected and held by detection-output holding circuit 8 as an ATC detected held voltage. On the other hand, reset-signal generating circuit 9 generates a timing signal and resetting circuit 7 resets the detection output. Thus, the reference voltage for the on-off discrimination can be set according to the received signal and an evil influence caused by transmission distance and reflected waves.
JP14550879A 1979-11-12 1979-11-12 Pulse receiver circuit Expired JPS5920219B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14550879A JPS5920219B2 (en) 1979-11-12 1979-11-12 Pulse receiver circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14550879A JPS5920219B2 (en) 1979-11-12 1979-11-12 Pulse receiver circuit

Publications (2)

Publication Number Publication Date
JPS5669957A true JPS5669957A (en) 1981-06-11
JPS5920219B2 JPS5920219B2 (en) 1984-05-11

Family

ID=15386865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14550879A Expired JPS5920219B2 (en) 1979-11-12 1979-11-12 Pulse receiver circuit

Country Status (1)

Country Link
JP (1) JPS5920219B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60161304U (en) * 1984-04-02 1985-10-26 古河電気工業株式会社 Single core optical connector

Also Published As

Publication number Publication date
JPS5920219B2 (en) 1984-05-11

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