JPS5458475A - Peak holding circuit - Google Patents
Peak holding circuitInfo
- Publication number
- JPS5458475A JPS5458475A JP12470577A JP12470577A JPS5458475A JP S5458475 A JPS5458475 A JP S5458475A JP 12470577 A JP12470577 A JP 12470577A JP 12470577 A JP12470577 A JP 12470577A JP S5458475 A JPS5458475 A JP S5458475A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- holding circuit
- detected
- amplitude
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Measurement Of Current Or Voltage (AREA)
Abstract
PURPOSE: To hold the peak values of sudden oscillation waves by providing an amplitude holding circuit which holds the delay signal from a delay circuit by the hold command signal from a zero detection circuit.
CONSTITUTION: The signal to be detected 1 is inputted to a first delay circuit 2 and second delay circuit 6. The delayed signal to be detected 3 becomes the signal having been delayed from the signal to be detected 1 by A, which is then inputted to a zero detection circuit 4. In the zero detection circuit 4, the amplitudes of the signal to be detected 1 and the delayed signal to be detected 3 are compared. When the amplitude difference of both becomes zero at the point B, a hold command signal 5 is outputted to an amplitude holding circuit 8. On the other hand, the delayed signal 7 is outputted from the second delay circuit 6 to the amplitude holding circuit 8. At the time when the hold command signal 5 is inputted to the amplitude holding circuit 8, the delayed signal 7 inputted to the amplitude holding circuit 8 becomes just the peak 71 of the amplitude and this peak 71 is held
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12470577A JPS5458475A (en) | 1977-10-18 | 1977-10-18 | Peak holding circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12470577A JPS5458475A (en) | 1977-10-18 | 1977-10-18 | Peak holding circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5458475A true JPS5458475A (en) | 1979-05-11 |
Family
ID=14892050
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12470577A Pending JPS5458475A (en) | 1977-10-18 | 1977-10-18 | Peak holding circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5458475A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4736744A (en) * | 1971-01-25 | 1972-11-29 | ||
| JPS503563B1 (en) * | 1973-04-16 | 1975-02-06 |
-
1977
- 1977-10-18 JP JP12470577A patent/JPS5458475A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4736744A (en) * | 1971-01-25 | 1972-11-29 | ||
| JPS503563B1 (en) * | 1973-04-16 | 1975-02-06 |
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