JPS5668030A - Logic circuit - Google Patents
Logic circuitInfo
- Publication number
- JPS5668030A JPS5668030A JP14417879A JP14417879A JPS5668030A JP S5668030 A JPS5668030 A JP S5668030A JP 14417879 A JP14417879 A JP 14417879A JP 14417879 A JP14417879 A JP 14417879A JP S5668030 A JPS5668030 A JP S5668030A
- Authority
- JP
- Japan
- Prior art keywords
- output
- logic
- logic circuit
- circuit
- detecting method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 abstract 2
- 230000002159 abnormal effect Effects 0.000 abstract 1
- 238000001514 detection method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Static Random-Access Memory (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
- Measurement Of Current Or Voltage (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14417879A JPS5668030A (en) | 1979-11-07 | 1979-11-07 | Logic circuit |
US06/139,595 US4337525A (en) | 1979-04-17 | 1980-04-11 | Asynchronous circuit responsive to changes in logic level |
EP80102068A EP0017990B1 (en) | 1979-04-17 | 1980-04-17 | Integrated memory circuit |
DE8080102068T DE3070410D1 (en) | 1979-04-17 | 1980-04-17 | Integrated memory circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14417879A JPS5668030A (en) | 1979-11-07 | 1979-11-07 | Logic circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5668030A true JPS5668030A (en) | 1981-06-08 |
JPH0127609B2 JPH0127609B2 (enrdf_load_html_response) | 1989-05-30 |
Family
ID=15356008
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14417879A Granted JPS5668030A (en) | 1979-04-17 | 1979-11-07 | Logic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5668030A (enrdf_load_html_response) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5952492A (ja) * | 1982-09-17 | 1984-03-27 | Fujitsu Ltd | スタテイツク型半導体記憶装置 |
JPS62165785A (ja) * | 1986-01-17 | 1987-07-22 | Mitsubishi Electric Corp | 半導体記憶装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5437462A (en) * | 1977-08-29 | 1979-03-19 | Toshiba Corp | Complementary mos circuit device |
-
1979
- 1979-11-07 JP JP14417879A patent/JPS5668030A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5437462A (en) * | 1977-08-29 | 1979-03-19 | Toshiba Corp | Complementary mos circuit device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5952492A (ja) * | 1982-09-17 | 1984-03-27 | Fujitsu Ltd | スタテイツク型半導体記憶装置 |
JPS62165785A (ja) * | 1986-01-17 | 1987-07-22 | Mitsubishi Electric Corp | 半導体記憶装置 |
Also Published As
Publication number | Publication date |
---|---|
JPH0127609B2 (enrdf_load_html_response) | 1989-05-30 |
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