JPS5667456A - Malfunction preventing device of arithmetic device - Google Patents

Malfunction preventing device of arithmetic device

Info

Publication number
JPS5667456A
JPS5667456A JP14346879A JP14346879A JPS5667456A JP S5667456 A JPS5667456 A JP S5667456A JP 14346879 A JP14346879 A JP 14346879A JP 14346879 A JP14346879 A JP 14346879A JP S5667456 A JPS5667456 A JP S5667456A
Authority
JP
Japan
Prior art keywords
output
multivibrator
arithmetic device
arithmetic
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14346879A
Other languages
Japanese (ja)
Inventor
Ichiro Kamata
Hirohisa Mizuhara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14346879A priority Critical patent/JPS5667456A/en
Publication of JPS5667456A publication Critical patent/JPS5667456A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To prevent an arithmetic device from malfunctioning by detecting the malfunction of the arithmetic device automatically by the 1st monostable multivibrator, by triggering the 2nd monostable multivibrator by its output, and then by resetting the arithmetic device by the output of the 2nd monostable multivibrator.
CONSTITUTION: From output part 3 of arithmetic device 1, pulse signals are outputted at constant cycles and when they are applied to trigger terminal 401 of the 1st retriggerable monostable multivibrator 4, the output terminal of multivibrator 8 is held at a low level so that the 2nd monostable multivibrator 8 will not be triggered. Since output 802 of multivibrator 8 is low-level one, arithmetic processing part 2 is not reset. In this case, the output pulse width of multivibrator 4 should be set longer than that of output part 3 by resistance 3 and capacitor 6. Once device 1 malfunctions, no pulse is sent from output part 3 and the output of multivibrator 4 is held at a high level to trigger multivibrator 8, so that processing part 2 will be reset by the output of multivibrator 8. The output of multivibrator 8, as the time determined by resistance 9 and capacitor 10 passes, falls in level to initialize device 1 automatically.
COPYRIGHT: (C)1981,JPO&Japio
JP14346879A 1979-11-05 1979-11-05 Malfunction preventing device of arithmetic device Pending JPS5667456A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14346879A JPS5667456A (en) 1979-11-05 1979-11-05 Malfunction preventing device of arithmetic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14346879A JPS5667456A (en) 1979-11-05 1979-11-05 Malfunction preventing device of arithmetic device

Publications (1)

Publication Number Publication Date
JPS5667456A true JPS5667456A (en) 1981-06-06

Family

ID=15339401

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14346879A Pending JPS5667456A (en) 1979-11-05 1979-11-05 Malfunction preventing device of arithmetic device

Country Status (1)

Country Link
JP (1) JPS5667456A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59158446A (en) * 1983-02-28 1984-09-07 Tamura Electric Works Ltd System for preventing malfunction in cpu
JPS60147852A (en) * 1984-01-11 1985-08-03 Sharp Corp Lsi device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59158446A (en) * 1983-02-28 1984-09-07 Tamura Electric Works Ltd System for preventing malfunction in cpu
JPS60147852A (en) * 1984-01-11 1985-08-03 Sharp Corp Lsi device

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