JPS5657334A - Integrated circuit device - Google Patents
Integrated circuit deviceInfo
- Publication number
- JPS5657334A JPS5657334A JP13311679A JP13311679A JPS5657334A JP S5657334 A JPS5657334 A JP S5657334A JP 13311679 A JP13311679 A JP 13311679A JP 13311679 A JP13311679 A JP 13311679A JP S5657334 A JPS5657334 A JP S5657334A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- terminal
- circuit
- signal
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
Landscapes
- Logic Circuits (AREA)
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
Abstract
PURPOSE:To obtain a circuit which is capable of an alteration or selection of the function, by providing the memory element the state of which can be set by the voltage applied to the power supply terminal in an integrated circuit and then securing a conversion for the state of the internal circuit according to the state of the memory element. CONSTITUTION:A connection is secured between the memory transistor TR1 having the floating gate structure and capable of an electrical writing and its load TR2, and the power supply terminal 3 is connected to the TR1 and 2 each. Then the control signal 4 supplied from the joint of the TR1 and 2 is supplied to the circuit 5 to be controlled. And in the initial stage, the threshold level of the TR1 is set lower than the voltage to be applied to the terminal 3 to turn on the TR1 as well as to set the signal 4 to 0 each. Then the electric charge is stored at the floating gate when the voltage higher than the writing voltage of the TR1 is applied to the terminal 3. And the threshold level of the TR1 is set higher than the voltage of the terminal 3. Thus the TR1 is turned off with the signal 4 set to 1 each. Then the signal 4 is converted to 0 or 1 by the voltage of the terminal 3, thus securing an alteration or selection of the function for the circuit 5.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13311679A JPS5657334A (en) | 1979-10-16 | 1979-10-16 | Integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13311679A JPS5657334A (en) | 1979-10-16 | 1979-10-16 | Integrated circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5657334A true JPS5657334A (en) | 1981-05-19 |
JPH0147939B2 JPH0147939B2 (en) | 1989-10-17 |
Family
ID=15097163
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13311679A Granted JPS5657334A (en) | 1979-10-16 | 1979-10-16 | Integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5657334A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58137327A (en) * | 1982-02-10 | 1983-08-15 | Toshiba Corp | Semiconductor integrated circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4918437A (en) * | 1972-06-09 | 1974-02-18 |
-
1979
- 1979-10-16 JP JP13311679A patent/JPS5657334A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4918437A (en) * | 1972-06-09 | 1974-02-18 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58137327A (en) * | 1982-02-10 | 1983-08-15 | Toshiba Corp | Semiconductor integrated circuit |
JPH0450770B2 (en) * | 1982-02-10 | 1992-08-17 | Tokyo Shibaura Electric Co |
Also Published As
Publication number | Publication date |
---|---|
JPH0147939B2 (en) | 1989-10-17 |
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