JPS5654193A - Digital exchange system - Google Patents

Digital exchange system

Info

Publication number
JPS5654193A
JPS5654193A JP13101879A JP13101879A JPS5654193A JP S5654193 A JPS5654193 A JP S5654193A JP 13101879 A JP13101879 A JP 13101879A JP 13101879 A JP13101879 A JP 13101879A JP S5654193 A JPS5654193 A JP S5654193A
Authority
JP
Japan
Prior art keywords
exchange
communication path
exchanger
multiplex
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13101879A
Other languages
Japanese (ja)
Inventor
Akira Mabukuro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13101879A priority Critical patent/JPS5654193A/en
Publication of JPS5654193A publication Critical patent/JPS5654193A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To increase the economy of exchange system, by connecting the input and output of a primary group digital exchanger communication path in exchanging with 64kb/s and a 0 order group digital exchanger communication path in exchange of in the unit of a fraction of 64kb/s. CONSTITUTION:A primary group exchanger communication path 42 in exchange with 64kb/s unit is copled with a 0 order group exchanger communication path 18 in exchange with a fraction of 64kb/s via multiplex lines 29, 30. The input of a 64kb/s multiplex line 17 is fed to the communication path 18 for the exchange in the 0 order group bearer speed, and exchange to an arbitrary path is made by introducing a part of the output of the communication path 18 to the input of the communication path 42. Accordingly, since the exchanger in exchange of 64kb/s unit and the multiplex traffic exchanger in exchange of multiplex bearer rate are unified, the digital exchange system can economically be constituted.
JP13101879A 1979-10-11 1979-10-11 Digital exchange system Pending JPS5654193A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13101879A JPS5654193A (en) 1979-10-11 1979-10-11 Digital exchange system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13101879A JPS5654193A (en) 1979-10-11 1979-10-11 Digital exchange system

Publications (1)

Publication Number Publication Date
JPS5654193A true JPS5654193A (en) 1981-05-14

Family

ID=15048064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13101879A Pending JPS5654193A (en) 1979-10-11 1979-10-11 Digital exchange system

Country Status (1)

Country Link
JP (1) JPS5654193A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62155697A (en) * 1985-11-01 1987-07-10 ノ−ザン・テレコム・リミテツド Method and apparatus for control in time-sharing multiplex frame
JPH01129698A (en) * 1987-11-16 1989-05-22 Nippon Telegr & Teleph Corp <Ntt> Digital exchange circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62155697A (en) * 1985-11-01 1987-07-10 ノ−ザン・テレコム・リミテツド Method and apparatus for control in time-sharing multiplex frame
JPH01129698A (en) * 1987-11-16 1989-05-22 Nippon Telegr & Teleph Corp <Ntt> Digital exchange circuit

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