JPS5645030A - Destroying surface that induces layer defects of semiconductor disk - Google Patents

Destroying surface that induces layer defects of semiconductor disk

Info

Publication number
JPS5645030A
JPS5645030A JP8303580A JP8303580A JPS5645030A JP S5645030 A JPS5645030 A JP S5645030A JP 8303580 A JP8303580 A JP 8303580A JP 8303580 A JP8303580 A JP 8303580A JP S5645030 A JPS5645030 A JP S5645030A
Authority
JP
Japan
Prior art keywords
induces
semiconductor disk
layer defects
destroying surface
destroying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8303580A
Other languages
English (en)
Other versions
JPS6226581B2 (ja
Inventor
Ranperuto Ingorufu
Buaaritsuhi Rainhoruto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siltronic AG
Original Assignee
Wacker Siltronic AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wacker Siltronic AG filed Critical Wacker Siltronic AG
Publication of JPS5645030A publication Critical patent/JPS5645030A/ja
Publication of JPS6226581B2 publication Critical patent/JPS6226581B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02016Backside treatment
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B31/00Machines or devices designed for polishing or abrading surfaces on work by means of tumbling apparatus or other apparatus in which the work and/or the abrasive material is loose; Accessories therefor
    • B24B31/003Machines or devices designed for polishing or abrading surfaces on work by means of tumbling apparatus or other apparatus in which the work and/or the abrasive material is loose; Accessories therefor whereby the workpieces are mounted on a holder and are immersed in the abrasive material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/959Mechanical polishing of wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Weting (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP8303580A 1979-07-05 1980-06-20 Destroying surface that induces layer defects of semiconductor disk Granted JPS5645030A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19792927220 DE2927220A1 (de) 1979-07-05 1979-07-05 Verfahren zur stapelfehlerinduzierenden oberflaechenzerstoerung von halbleiterscheiben

Publications (2)

Publication Number Publication Date
JPS5645030A true JPS5645030A (en) 1981-04-24
JPS6226581B2 JPS6226581B2 (ja) 1987-06-09

Family

ID=6075008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8303580A Granted JPS5645030A (en) 1979-07-05 1980-06-20 Destroying surface that induces layer defects of semiconductor disk

Country Status (5)

Country Link
US (1) US5133160A (ja)
EP (1) EP0022960B1 (ja)
JP (1) JPS5645030A (ja)
CA (1) CA1154176A (ja)
DE (2) DE2927220A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109571269A (zh) * 2018-12-18 2019-04-05 福建福晶科技股份有限公司 一种去除亚表面损伤层的加工方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5006475A (en) * 1989-07-12 1991-04-09 Texas Instruments Incorporated Method for backside damage of silicon wafers
DE3148957C2 (de) * 1981-12-10 1987-01-02 Wacker-Chemitronic Gesellschaft für Elektronik-Grundstoffe mbH, 8263 Burghausen Verfahren zum Herstellen rückseitig oberflächengestörter Halbleiterscheiben
DE3246480A1 (de) * 1982-12-15 1984-06-20 Wacker-Chemitronic Gesellschaft für Elektronik-Grundstoffe mbH, 8263 Burghausen Verfahren zur herstellung von halbleiterscheiben mit getternder scheibenrueckseite
EP0445728B1 (en) * 1990-03-07 1994-06-08 Hitachi, Ltd. Apparatus and method for cleaning solid surface
JP2613498B2 (ja) * 1991-03-15 1997-05-28 信越半導体株式会社 Si単結晶ウエーハの熱処理方法
US6379226B1 (en) * 1999-12-08 2002-04-30 Memc Electronic Materials, Inc. Method for storing carrier for polishing wafer

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE512585A (ja) * 1951-07-03
NL248617A (ja) * 1959-03-13
DE1202171B (de) * 1959-07-03 1965-09-30 Dr Guenter Friese Verfahren zur Oberflaechenbearbeitung von Werkstuecken
US3385682A (en) * 1965-04-29 1968-05-28 Sprague Electric Co Method and reagent for surface polishing
GB1185555A (en) * 1967-11-17 1970-03-25 Standard Telephones Cables Ltd Improvements in or relating to the Entraining of a Powder in a Gas Stream
US3573023A (en) * 1968-09-24 1971-03-30 Ingersoll Rand Co Methods for improving hardness and strength of ceramic materials
US3701696A (en) * 1969-08-20 1972-10-31 Gen Electric Process for simultaneously gettering,passivating and locating a junction within a silicon crystal
DE2059280A1 (de) * 1970-12-02 1972-06-29 Licentia Gmbh Verfahren zur Herstellung einer mesafoermigen Randkontur
US3905162A (en) * 1974-07-23 1975-09-16 Silicon Material Inc Method of preparing high yield semiconductor wafer
DE2537464A1 (de) * 1975-08-22 1977-03-03 Wacker Chemitronic Verfahren zur entfernung spezifischer kristallbaufehler aus halbleiterscheiben
US4018626A (en) * 1975-09-10 1977-04-19 International Business Machines Corporation Impact sound stressing for semiconductor devices
US4144099A (en) * 1977-10-31 1979-03-13 International Business Machines Corporation High performance silicon wafer and fabrication process
JPS5811101B2 (ja) * 1977-11-25 1983-03-01 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 半導体の表面処理方法
US4290793A (en) * 1978-12-08 1981-09-22 Liberty Glass Company Fluid bed chemical strengthening of glass objects

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109571269A (zh) * 2018-12-18 2019-04-05 福建福晶科技股份有限公司 一种去除亚表面损伤层的加工方法

Also Published As

Publication number Publication date
EP0022960B1 (de) 1983-09-21
DE3064917D1 (en) 1983-10-27
JPS6226581B2 (ja) 1987-06-09
DE2927220A1 (de) 1981-01-15
CA1154176A (en) 1983-09-20
EP0022960A1 (de) 1981-01-28
US5133160A (en) 1992-07-28

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