JPS5644106A - Tape recorder - Google Patents

Tape recorder

Info

Publication number
JPS5644106A
JPS5644106A JP12114879A JP12114879A JPS5644106A JP S5644106 A JPS5644106 A JP S5644106A JP 12114879 A JP12114879 A JP 12114879A JP 12114879 A JP12114879 A JP 12114879A JP S5644106 A JPS5644106 A JP S5644106A
Authority
JP
Japan
Prior art keywords
time
level
circuit
recording
display unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12114879A
Other languages
Japanese (ja)
Other versions
JPS6113302B2 (en
Inventor
Masateru Fujimoto
Kazuaki Saga
Hirotaka Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP12114879A priority Critical patent/JPS5644106A/en
Publication of JPS5644106A publication Critical patent/JPS5644106A/en
Publication of JPS6113302B2 publication Critical patent/JPS6113302B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

PURPOSE: To set the best recording level automatically, to display the set level and then to attain the display of recording muting time at the same time, by setting the recording level through one-touch operation.
CONSTITUTION: With automatic setting switch 7 depressed, time setting circuit 6 is driven to generate a pulse of time width equivalent to set time, which is applied to maximum-value holding circuit 5. Among levels detected by level detector 4, circuit 5 holds the maximum level within the time set by circuit 6 and then supplies gain control circuit 3 and display unit driving circuit 41 with a control signal that corresponds to it. Therefore, circuit 3 is controlled to a gain determined by the largest level within the constant time of an input signal and the level is displayed by display unit 43. With recording muting switch 45 operated, the output of pulse generator 51 is counted by counter 54, whose count result is displayed by display unit 43 moment by moment, so that the recording muting time can be known.
COPYRIGHT: (C)1981,JPO&Japio
JP12114879A 1979-09-19 1979-09-19 Tape recorder Granted JPS5644106A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12114879A JPS5644106A (en) 1979-09-19 1979-09-19 Tape recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12114879A JPS5644106A (en) 1979-09-19 1979-09-19 Tape recorder

Publications (2)

Publication Number Publication Date
JPS5644106A true JPS5644106A (en) 1981-04-23
JPS6113302B2 JPS6113302B2 (en) 1986-04-12

Family

ID=14804035

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12114879A Granted JPS5644106A (en) 1979-09-19 1979-09-19 Tape recorder

Country Status (1)

Country Link
JP (1) JPS5644106A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63148401A (en) * 1986-12-10 1988-06-21 Matsushita Electric Ind Co Ltd Production of pickup arm

Also Published As

Publication number Publication date
JPS6113302B2 (en) 1986-04-12

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