JPS5644107A - Tape recorder - Google Patents

Tape recorder

Info

Publication number
JPS5644107A
JPS5644107A JP12114979A JP12114979A JPS5644107A JP S5644107 A JPS5644107 A JP S5644107A JP 12114979 A JP12114979 A JP 12114979A JP 12114979 A JP12114979 A JP 12114979A JP S5644107 A JPS5644107 A JP S5644107A
Authority
JP
Japan
Prior art keywords
circuit
recording
time
level
agc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12114979A
Other languages
Japanese (ja)
Other versions
JPS6043563B2 (en
Inventor
Masateru Fujimoto
Kazuaki Saga
Hirotaka Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP12114979A priority Critical patent/JPS6043563B2/en
Publication of JPS5644107A publication Critical patent/JPS5644107A/en
Publication of JPS6043563B2 publication Critical patent/JPS6043563B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

PURPOSE: To make it possible to set the best recording level automatically by setting the recording level through one-touch operation.
CONSTITUTION: With automatic setting switch 7 depressed, time setting circuit 6 is driven to generate a pulse of time width equivalent to the set time, which is applied to maximum-value holding circuit 5. Among levels detected by level detector 4, circuit 5 holds the maximum level within the time set by circuit 6 and supplies gain control circuit 3 and display unit driving circuit 41 with a control signal that corresponds to it. At this time, AGC switch 48 is closed by relay 47 and AGC circuit 49 provided to recording amplifier 45 is put into operation. Consequently, a signal applied to input 1 is controlled by AGC circuit 49 so that no matter what set value gain control circuit 3 has, namely, no matter how excessive the signal level of output 2 is, recording current flowed to recording head 46 via recording amplifier 45 will be within the range of proper recording levels.
COPYRIGHT: (C)1981,JPO&Japio
JP12114979A 1979-09-19 1979-09-19 tape recorder Expired JPS6043563B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12114979A JPS6043563B2 (en) 1979-09-19 1979-09-19 tape recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12114979A JPS6043563B2 (en) 1979-09-19 1979-09-19 tape recorder

Publications (2)

Publication Number Publication Date
JPS5644107A true JPS5644107A (en) 1981-04-23
JPS6043563B2 JPS6043563B2 (en) 1985-09-28

Family

ID=14804059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12114979A Expired JPS6043563B2 (en) 1979-09-19 1979-09-19 tape recorder

Country Status (1)

Country Link
JP (1) JPS6043563B2 (en)

Also Published As

Publication number Publication date
JPS6043563B2 (en) 1985-09-28

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