JPS5640938A - Input/output control unit - Google Patents

Input/output control unit

Info

Publication number
JPS5640938A
JPS5640938A JP11688079A JP11688079A JPS5640938A JP S5640938 A JPS5640938 A JP S5640938A JP 11688079 A JP11688079 A JP 11688079A JP 11688079 A JP11688079 A JP 11688079A JP S5640938 A JPS5640938 A JP S5640938A
Authority
JP
Japan
Prior art keywords
input
data
control unit
register
output control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11688079A
Other languages
Japanese (ja)
Inventor
Akira Nakayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11688079A priority Critical patent/JPS5640938A/en
Publication of JPS5640938A publication Critical patent/JPS5640938A/en
Pending legal-status Critical Current

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  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To save the quantity of the hardware, by generating an interruption request to the central processor by the carry which is produced in case the data exceeds the prescribed page size during the transfer of data and at the same time discontinuing the transfer of data.
CONSTITUTION: The buffer address of the input/output control word stored in the main memory is converted into the real address and then stored in the data buffer address register 22. The value of register 22 is given to the operator 27 and then increased or decreased based on the prescribed value given from the increase/decrease number deciding circuit 29. And when the result of this operation exceeds the prescribed value, the carry signal is turned to 1 and then applied to the central processor in the form of the interruption request signal as well as to the input/ output data transfer control unit 213 in the form of the interruption indication signal respectively. With application of the interruption request signal to the central processor, the next page address is converted into the real address and then transmitted to the input/output control unit 13 to be stored in the register 22.
COPYRIGHT: (C)1981,JPO&Japio
JP11688079A 1979-09-12 1979-09-12 Input/output control unit Pending JPS5640938A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11688079A JPS5640938A (en) 1979-09-12 1979-09-12 Input/output control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11688079A JPS5640938A (en) 1979-09-12 1979-09-12 Input/output control unit

Publications (1)

Publication Number Publication Date
JPS5640938A true JPS5640938A (en) 1981-04-17

Family

ID=14697916

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11688079A Pending JPS5640938A (en) 1979-09-12 1979-09-12 Input/output control unit

Country Status (1)

Country Link
JP (1) JPS5640938A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5069941A (en) * 1973-07-02 1975-06-11
JPS5177143A (en) * 1974-12-27 1976-07-03 Tokyo Shibaura Electric Co

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5069941A (en) * 1973-07-02 1975-06-11
JPS5177143A (en) * 1974-12-27 1976-07-03 Tokyo Shibaura Electric Co

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