JPS55140972A - Coordinate value checking circuit - Google Patents

Coordinate value checking circuit

Info

Publication number
JPS55140972A
JPS55140972A JP4789279A JP4789279A JPS55140972A JP S55140972 A JPS55140972 A JP S55140972A JP 4789279 A JP4789279 A JP 4789279A JP 4789279 A JP4789279 A JP 4789279A JP S55140972 A JPS55140972 A JP S55140972A
Authority
JP
Japan
Prior art keywords
pulse
data
circuit
coordinate value
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4789279A
Other languages
Japanese (ja)
Inventor
Shigeo Wakazono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4789279A priority Critical patent/JPS55140972A/en
Publication of JPS55140972A publication Critical patent/JPS55140972A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To avoid sending the reading data to the processor by deciding it as the erroneous data in case the continuous coordinate value is read mistakenly or the light pen gets out of the basement board, thus omitting the data check at the processor.
CONSTITUTION: Reading data 10 of the coordinate value is stored into the 1st register 11 via reading pulse 14. And data strobe pulse 20 is transmitted to the processor via AND gate circuit 19 in the case of the first data 10. Pulse 20 is then applied to the 2nd register 12 after the delay given by delay circuit 17 in the fixed time, and the data of register 11 is stored into register 12. At the same time, control circuit 16 which controls OR gate circuit 18 with pulse 14 used for the input is provided. And then the comparison is given at comparator 13 between the continuous coordinate value stored in registers 11 and 12. And in case the difference of the absolute value is within the fixed range, the logic is set up for circuit 18 to deliver pulse 20. While in case the light pen gets out of the basement board, the logic is not set up by the output of circuit 16 to inhibit the transmission of pulse 20.
COPYRIGHT: (C)1980,JPO&Japio
JP4789279A 1979-04-20 1979-04-20 Coordinate value checking circuit Pending JPS55140972A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4789279A JPS55140972A (en) 1979-04-20 1979-04-20 Coordinate value checking circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4789279A JPS55140972A (en) 1979-04-20 1979-04-20 Coordinate value checking circuit

Publications (1)

Publication Number Publication Date
JPS55140972A true JPS55140972A (en) 1980-11-04

Family

ID=12788050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4789279A Pending JPS55140972A (en) 1979-04-20 1979-04-20 Coordinate value checking circuit

Country Status (1)

Country Link
JP (1) JPS55140972A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06161647A (en) * 1992-11-25 1994-06-10 Sharp Corp Pen input processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06161647A (en) * 1992-11-25 1994-06-10 Sharp Corp Pen input processor

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