JPS564070A - Testing method of integrated circuit - Google Patents

Testing method of integrated circuit

Info

Publication number
JPS564070A
JPS564070A JP7997779A JP7997779A JPS564070A JP S564070 A JPS564070 A JP S564070A JP 7997779 A JP7997779 A JP 7997779A JP 7997779 A JP7997779 A JP 7997779A JP S564070 A JPS564070 A JP S564070A
Authority
JP
Japan
Prior art keywords
fets
integrated circuit
leakage current
testing method
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7997779A
Other languages
Japanese (ja)
Other versions
JPS6229750B2 (en
Inventor
Takeshi Mizusawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP7997779A priority Critical patent/JPS564070A/en
Publication of JPS564070A publication Critical patent/JPS564070A/en
Publication of JPS6229750B2 publication Critical patent/JPS6229750B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

PURPOSE: To accomplish easy and quick detection of poor connection in the load element connection by generating the leakage current at the pn junction with the irradiation of light on IC surface.
CONSTITUTION: The FETs Q1 and Q2 composing the FF are driven with read- out and write-in FETs Q3 and Q4 according to the potential of the address line. Opposite leakage current flows between the pn junctions A and B of the circuit and light is irradiated on the IC surface enough to varnish the retained information quickly. As a result, poor connection of the load elements R1 and R2 can be detected quickly.
COPYRIGHT: (C)1981,JPO&Japio
JP7997779A 1979-06-25 1979-06-25 Testing method of integrated circuit Granted JPS564070A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7997779A JPS564070A (en) 1979-06-25 1979-06-25 Testing method of integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7997779A JPS564070A (en) 1979-06-25 1979-06-25 Testing method of integrated circuit

Publications (2)

Publication Number Publication Date
JPS564070A true JPS564070A (en) 1981-01-16
JPS6229750B2 JPS6229750B2 (en) 1987-06-27

Family

ID=13705377

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7997779A Granted JPS564070A (en) 1979-06-25 1979-06-25 Testing method of integrated circuit

Country Status (1)

Country Link
JP (1) JPS564070A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4719418A (en) * 1985-02-19 1988-01-12 International Business Machines Corporation Defect leakage screen system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4719418A (en) * 1985-02-19 1988-01-12 International Business Machines Corporation Defect leakage screen system

Also Published As

Publication number Publication date
JPS6229750B2 (en) 1987-06-27

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