JPS5636742A - Method for using random access memory as address decoder - Google Patents

Method for using random access memory as address decoder

Info

Publication number
JPS5636742A
JPS5636742A JP11214479A JP11214479A JPS5636742A JP S5636742 A JPS5636742 A JP S5636742A JP 11214479 A JP11214479 A JP 11214479A JP 11214479 A JP11214479 A JP 11214479A JP S5636742 A JPS5636742 A JP S5636742A
Authority
JP
Japan
Prior art keywords
address
random access
data
access memory
written
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11214479A
Other languages
Japanese (ja)
Inventor
Kuniharu Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP11214479A priority Critical patent/JPS5636742A/en
Publication of JPS5636742A publication Critical patent/JPS5636742A/en
Pending legal-status Critical Current

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  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

PURPOSE:To attain efficient random access by storing a random access memory with address information for access to a mass storage file. CONSTITUTION:For an area where address information is stored, addresses a- a+(m-1) are assigned in random access memory DM. At this time, this area is previously filled with special symbols. The data storage address starts at address b of random access file MM. Data are rgistered at address b of MM by giving key k1. In this case, value b is written at address a+(k1-1). Then, key k2 is supplied to register data at address b+(length of single data) of MM. At address a+(k2-1), b+(length of single data) is written. Similarly, n data are written up to address b+nX(length of single data).
JP11214479A 1979-09-01 1979-09-01 Method for using random access memory as address decoder Pending JPS5636742A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11214479A JPS5636742A (en) 1979-09-01 1979-09-01 Method for using random access memory as address decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11214479A JPS5636742A (en) 1979-09-01 1979-09-01 Method for using random access memory as address decoder

Publications (1)

Publication Number Publication Date
JPS5636742A true JPS5636742A (en) 1981-04-10

Family

ID=14579315

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11214479A Pending JPS5636742A (en) 1979-09-01 1979-09-01 Method for using random access memory as address decoder

Country Status (1)

Country Link
JP (1) JPS5636742A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS581260A (en) * 1981-06-27 1983-01-06 Fujitsu Ltd Accessing system for random access file
JPS61211653A (en) * 1985-03-15 1986-09-19 Hitachi Plant Eng & Constr Co Ltd Ventilating facilities of animal breeding chamer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS581260A (en) * 1981-06-27 1983-01-06 Fujitsu Ltd Accessing system for random access file
JPS61211653A (en) * 1985-03-15 1986-09-19 Hitachi Plant Eng & Constr Co Ltd Ventilating facilities of animal breeding chamer
JPH0317455B2 (en) * 1985-03-15 1991-03-08 Hitachi Plant Eng & Constr Co

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