JPS5631147A - Diagnosing system for information processor - Google Patents

Abstract

PURPOSE: To ensure a delicate diagnosis in an easy way not only for the single unit of the internal circuit but for the information processor, by using in switching the latch circuit which is formed at the front stage inside the single unit of the circuit for a pseudo random number generating circuit during the diagnosis.

CONSTITUTION: The chip 4-2, one of several internal circuits, contains the central circuit 400 to be tested plus the latch circuits 41W43 and gate circuit installed at the front stage and the information compressing circuit 410 at the rear stage each. The input information I1WI3 are supplied to the latch circuits 41W43 via the gate circuit and by the mode switch signal 401 and at the time of the normal execution. When the diagnosis input is set, the AND circuits 412, 422 and 432 are opened by the mode switch signal 402. Then a shift register type pseudo random number generating circuit having the linear feedback is formed with the circuits 41W43 plus the exclusive logic sum circuit 44, and thus the diagnosis input is applied. The clock which is supplied to the pseudo random number generating circuit is applied in an asynchronous way via the clock output control signal 404 and AND circuit 404 each. As a result, not only the single unit of each circuit but a group of the circuit or the units can be diagnosed.

COPYRIGHT: (C)1981,JPO&Japio