JPS5630328A - Nonbreak circuit - Google Patents
Nonbreak circuitInfo
- Publication number
- JPS5630328A JPS5630328A JP10597779A JP10597779A JPS5630328A JP S5630328 A JPS5630328 A JP S5630328A JP 10597779 A JP10597779 A JP 10597779A JP 10597779 A JP10597779 A JP 10597779A JP S5630328 A JPS5630328 A JP S5630328A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- impedance
- negative feedback
- variation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/74—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission for increasing reliability, e.g. using redundant or spare channels or apparatus
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
Abstract
PURPOSE:To form a circuit free from variation in output level by providing a negative feedback system from the output to the input by connecting the output of parallel-connected circuits via a resistance that prevents termination of impedance due to an accident. CONSTITUTION:Input impedance values 91 and 101 of parallel-connected circuits 9 and 10 are set more than ten times as high as input impedance 31 of the circuit system and output impedance values 92 and 102 are set less one tenth output impedance 32 of the circuit system, thereby making connections via certain resistances 13 and 14. Further, the negative feedback system is provided which includes hybrid branch circuit 34 and negative feedback circuit 4 from outputs of circuits 9 and 10, so that level variation due to variation in load impedance of a circuit having run into trouble will be reduced to one over a feedback difference.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10597779A JPS5630328A (en) | 1979-08-22 | 1979-08-22 | Nonbreak circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10597779A JPS5630328A (en) | 1979-08-22 | 1979-08-22 | Nonbreak circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5630328A true JPS5630328A (en) | 1981-03-26 |
JPS639412B2 JPS639412B2 (en) | 1988-02-29 |
Family
ID=14421808
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10597779A Granted JPS5630328A (en) | 1979-08-22 | 1979-08-22 | Nonbreak circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5630328A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5011162A (en) * | 1973-05-29 | 1975-02-05 |
-
1979
- 1979-08-22 JP JP10597779A patent/JPS5630328A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5011162A (en) * | 1973-05-29 | 1975-02-05 |
Also Published As
Publication number | Publication date |
---|---|
JPS639412B2 (en) | 1988-02-29 |
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