JPS5629741A - Undesired signal preventing circuit for programmable lsi - Google Patents
Undesired signal preventing circuit for programmable lsiInfo
- Publication number
- JPS5629741A JPS5629741A JP10481479A JP10481479A JPS5629741A JP S5629741 A JPS5629741 A JP S5629741A JP 10481479 A JP10481479 A JP 10481479A JP 10481479 A JP10481479 A JP 10481479A JP S5629741 A JPS5629741 A JP S5629741A
- Authority
- JP
- Japan
- Prior art keywords
- pin
- signal
- output
- lsi1
- logic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
- Microcomputers (AREA)
Abstract
PURPOSE: To obtain an extremely economical undesired signal preventing circuit, by adding the pull-down resistance to the signal pin of the programmable LSI.
CONSTITUTION: The pull-down resistance 10 obtained from the fixed relational formula is connected between the signal line 11 which connects the signal pin 1a of the programmable LSI1 and the buffer gate 6 and the earth. The reset signal A is applied to LSI1 to put pin 1a under the input mode and the high-impedance state for a fixed time. During this period, the resistance 10 keeps pin 1a at the logic 0, and thus the undesired output signal is reduced not to emerge to the output signal line 3. The pin output is set to the logic 0 at the moment when pin 1a is set to the output mode. After this, the real signal output produced from the control program inside the LSI1 is delivered with pin 1a set to the logic 1. Accordingly, the undesired signal can be blocked in an extremely simple way and just by a low-cost resistance.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10481479A JPS5629741A (en) | 1979-08-16 | 1979-08-16 | Undesired signal preventing circuit for programmable lsi |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10481479A JPS5629741A (en) | 1979-08-16 | 1979-08-16 | Undesired signal preventing circuit for programmable lsi |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5629741A true JPS5629741A (en) | 1981-03-25 |
Family
ID=14390870
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10481479A Pending JPS5629741A (en) | 1979-08-16 | 1979-08-16 | Undesired signal preventing circuit for programmable lsi |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5629741A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS593501A (en) * | 1982-06-29 | 1984-01-10 | Mitsubishi Electric Corp | Control device |
JPS61155926U (en) * | 1985-03-19 | 1986-09-27 | ||
JPS63165562U (en) * | 1987-04-18 | 1988-10-27 | ||
JPH056443A (en) * | 1991-06-26 | 1993-01-14 | Mitsubishi Electric Corp | Computer system |
-
1979
- 1979-08-16 JP JP10481479A patent/JPS5629741A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS593501A (en) * | 1982-06-29 | 1984-01-10 | Mitsubishi Electric Corp | Control device |
JPS61155926U (en) * | 1985-03-19 | 1986-09-27 | ||
JPH0313785Y2 (en) * | 1985-03-19 | 1991-03-28 | ||
JPS63165562U (en) * | 1987-04-18 | 1988-10-27 | ||
JPH056443A (en) * | 1991-06-26 | 1993-01-14 | Mitsubishi Electric Corp | Computer system |
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