JPS562741A - Relock circuit of sampling quartz lock circuit - Google Patents

Relock circuit of sampling quartz lock circuit

Info

Publication number
JPS562741A
JPS562741A JP7955179A JP7955179A JPS562741A JP S562741 A JPS562741 A JP S562741A JP 7955179 A JP7955179 A JP 7955179A JP 7955179 A JP7955179 A JP 7955179A JP S562741 A JPS562741 A JP S562741A
Authority
JP
Japan
Prior art keywords
trq3
output
circuit
switching
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7955179A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6247377B2 (enrdf_load_stackoverflow
Inventor
Eigo Imamura
Masami Masuhara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP7955179A priority Critical patent/JPS562741A/ja
Publication of JPS562741A publication Critical patent/JPS562741A/ja
Publication of JPS6247377B2 publication Critical patent/JPS6247377B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)
JP7955179A 1979-06-22 1979-06-22 Relock circuit of sampling quartz lock circuit Granted JPS562741A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7955179A JPS562741A (en) 1979-06-22 1979-06-22 Relock circuit of sampling quartz lock circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7955179A JPS562741A (en) 1979-06-22 1979-06-22 Relock circuit of sampling quartz lock circuit

Publications (2)

Publication Number Publication Date
JPS562741A true JPS562741A (en) 1981-01-13
JPS6247377B2 JPS6247377B2 (enrdf_load_stackoverflow) 1987-10-07

Family

ID=13693136

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7955179A Granted JPS562741A (en) 1979-06-22 1979-06-22 Relock circuit of sampling quartz lock circuit

Country Status (1)

Country Link
JP (1) JPS562741A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5930147A (ja) * 1982-08-11 1984-02-17 Hitachi Ltd マイクロ・プログラム・テスト分岐制御方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5930147A (ja) * 1982-08-11 1984-02-17 Hitachi Ltd マイクロ・プログラム・テスト分岐制御方式

Also Published As

Publication number Publication date
JPS6247377B2 (enrdf_load_stackoverflow) 1987-10-07

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