JPS562732A - Series-parallel conversion system - Google Patents

Series-parallel conversion system

Info

Publication number
JPS562732A
JPS562732A JP7781879A JP7781879A JPS562732A JP S562732 A JPS562732 A JP S562732A JP 7781879 A JP7781879 A JP 7781879A JP 7781879 A JP7781879 A JP 7781879A JP S562732 A JPS562732 A JP S562732A
Authority
JP
Japan
Prior art keywords
signal
parallel
series
circuit
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7781879A
Other languages
Japanese (ja)
Inventor
Mutsuto Noda
Tokuo Matsushita
Mitsuo Saijo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7781879A priority Critical patent/JPS562732A/en
Publication of JPS562732A publication Critical patent/JPS562732A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/45—Transmitting circuits; Receiving circuits using electronic distributors

Abstract

PURPOSE:To make it possible to use series-parallel and parallel-series converting circuits commonly, by generating sampling pulses of transmitting and receiving signals in the modulating and demodulating circuit side and by using these sampling pulses as a synchronizing signal in parallel-series and series-parallel converting circuits. CONSTITUTION:In case of series-parallel (S/P) conversion, when signal 11 is input to demodulating circuit 1, receiving signal 7 corresponding to signal 11 and sampling pulse 5 are sent to S/P converting circuit 2. In circuit 2, signal 7 is sampled by pulse 5 to output parallel output signal 9. Next, in case of parallel-series (P/S) conversion, the signal of parallel input 10 is sampled by sampling pulse 6 in P/S converting circuit 4 to sent transmission pulse 8 and is converted to transmission signal 12 while establishing synchronism of the signal of pulse 8 in modulating circuit 3 and is output. As a result, S/P and P/S converting circuits can be used commonly.
JP7781879A 1979-06-20 1979-06-20 Series-parallel conversion system Pending JPS562732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7781879A JPS562732A (en) 1979-06-20 1979-06-20 Series-parallel conversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7781879A JPS562732A (en) 1979-06-20 1979-06-20 Series-parallel conversion system

Publications (1)

Publication Number Publication Date
JPS562732A true JPS562732A (en) 1981-01-13

Family

ID=13644603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7781879A Pending JPS562732A (en) 1979-06-20 1979-06-20 Series-parallel conversion system

Country Status (1)

Country Link
JP (1) JPS562732A (en)

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