JPS5558644A - Data transmission system - Google Patents
Data transmission systemInfo
- Publication number
- JPS5558644A JPS5558644A JP13097178A JP13097178A JPS5558644A JP S5558644 A JPS5558644 A JP S5558644A JP 13097178 A JP13097178 A JP 13097178A JP 13097178 A JP13097178 A JP 13097178A JP S5558644 A JPS5558644 A JP S5558644A
- Authority
- JP
- Japan
- Prior art keywords
- time
- circuit
- signals
- prescribing
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/45—Transmitting circuits; Receiving circuits using electronic distributors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
PURPOSE:To multiplex a transmission line in time division to make transmission possible with one transmission line only by providing a time prescribing circuit, which performs a simple logical operation for time-prescribed parallel signals, before or after a parallel-series converter. CONSTITUTION:Parallel signals A and B inputted to interface circuit 1 are converted to series signals by multiplex transmission circuit 2 and are transmitted by transmission cable 7 and are demodulated by demodulator circuit 4 and are converted to parallel signals. However, in case that the minimum time difference to be satisfied between signals A and B is T1, outputs of the same timing are issued as demodulation outputs because the time difference is eliminated at a sampling time of multiplexing, and therefore, a time-prescribed parallel output are obtained as the output of time prescribing circuit 10 by delaying input B by time TD(>=T1) for input A by time prescribing circuit 10 in case of the same timing of inputs A and B. The time prescribing circuit is constituted by the waveform operation circuit of delay lines, etc., provided between respective outputs and inputs.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13097178A JPS5558644A (en) | 1978-10-26 | 1978-10-26 | Data transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13097178A JPS5558644A (en) | 1978-10-26 | 1978-10-26 | Data transmission system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5558644A true JPS5558644A (en) | 1980-05-01 |
JPS5755345B2 JPS5755345B2 (en) | 1982-11-24 |
Family
ID=15046878
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13097178A Granted JPS5558644A (en) | 1978-10-26 | 1978-10-26 | Data transmission system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5558644A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5748839A (en) * | 1980-09-05 | 1982-03-20 | Matsushita Electric Ind Co Ltd | Data transmitter |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0431365Y2 (en) * | 1985-01-11 | 1992-07-28 | ||
JPH0433295Y2 (en) * | 1986-10-17 | 1992-08-10 |
-
1978
- 1978-10-26 JP JP13097178A patent/JPS5558644A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5748839A (en) * | 1980-09-05 | 1982-03-20 | Matsushita Electric Ind Co Ltd | Data transmitter |
Also Published As
Publication number | Publication date |
---|---|
JPS5755345B2 (en) | 1982-11-24 |
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