JPS5626456A - Thick film intergrated circuit device - Google Patents

Thick film intergrated circuit device

Info

Publication number
JPS5626456A
JPS5626456A JP10204279A JP10204279A JPS5626456A JP S5626456 A JPS5626456 A JP S5626456A JP 10204279 A JP10204279 A JP 10204279A JP 10204279 A JP10204279 A JP 10204279A JP S5626456 A JPS5626456 A JP S5626456A
Authority
JP
Japan
Prior art keywords
substrate
terminal
circuit device
thick film
intergrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10204279A
Other languages
English (en)
Inventor
Hitoshi Toda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10204279A priority Critical patent/JPS5626456A/ja
Publication of JPS5626456A publication Critical patent/JPS5626456A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP10204279A 1979-08-09 1979-08-09 Thick film intergrated circuit device Pending JPS5626456A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10204279A JPS5626456A (en) 1979-08-09 1979-08-09 Thick film intergrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10204279A JPS5626456A (en) 1979-08-09 1979-08-09 Thick film intergrated circuit device

Publications (1)

Publication Number Publication Date
JPS5626456A true JPS5626456A (en) 1981-03-14

Family

ID=14316706

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10204279A Pending JPS5626456A (en) 1979-08-09 1979-08-09 Thick film intergrated circuit device

Country Status (1)

Country Link
JP (1) JPS5626456A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62227418A (ja) * 1986-03-29 1987-10-06 Nippon Steel Corp 溶銑予備処理設備における集塵方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62227418A (ja) * 1986-03-29 1987-10-06 Nippon Steel Corp 溶銑予備処理設備における集塵方法

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