JPS5624846A - Data transfer control system between control devices - Google Patents

Data transfer control system between control devices

Info

Publication number
JPS5624846A
JPS5624846A JP10057079A JP10057079A JPS5624846A JP S5624846 A JPS5624846 A JP S5624846A JP 10057079 A JP10057079 A JP 10057079A JP 10057079 A JP10057079 A JP 10057079A JP S5624846 A JPS5624846 A JP S5624846A
Authority
JP
Japan
Prior art keywords
memory
conditions
control device
bus
data transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10057079A
Other languages
Japanese (ja)
Inventor
Toshihisa Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10057079A priority Critical patent/JPS5624846A/en
Publication of JPS5624846A publication Critical patent/JPS5624846A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Selective Calling Equipment (AREA)

Abstract

PURPOSE:To reduce the bus occupying time by providing the memory which stores the connecting conditions of the transmission side of each control device plus the memory which stores the state of the reception side to the bus control device and then carrying out the data transfer between the control devices having the coincidence of the information between the both memories. CONSTITUTION:Bus controller 19 writes the information of control data lines 12 amd 13 into memories 11 and 2 respectively. Both the conditions of the calling control unit read out of memory 2 to the called control device and the conditions to secure the reception of the data of the called control device given from memory 11 are supplied to the collating circuit. And when the coincidence is obtained between the both conditions, the bus use permission signal is transmitted from signal generating circuit 5.
JP10057079A 1979-08-06 1979-08-06 Data transfer control system between control devices Pending JPS5624846A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10057079A JPS5624846A (en) 1979-08-06 1979-08-06 Data transfer control system between control devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10057079A JPS5624846A (en) 1979-08-06 1979-08-06 Data transfer control system between control devices

Publications (1)

Publication Number Publication Date
JPS5624846A true JPS5624846A (en) 1981-03-10

Family

ID=14277559

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10057079A Pending JPS5624846A (en) 1979-08-06 1979-08-06 Data transfer control system between control devices

Country Status (1)

Country Link
JP (1) JPS5624846A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59108129A (en) * 1982-12-14 1984-06-22 Seiko Instr & Electronics Ltd Transferring method of data

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59108129A (en) * 1982-12-14 1984-06-22 Seiko Instr & Electronics Ltd Transferring method of data

Similar Documents

Publication Publication Date Title
EP0095363A3 (en) Direct memory access data transfer system for use with plural processors
ES8102439A1 (en) Data-transfer controlling system.
JPS5624846A (en) Data transfer control system between control devices
AU6672681A (en) Data transmission
JPS5310912A (en) Two-way multiplex transmission control system
ES460450A1 (en) Local device in a control information transfer system
JPS5622157A (en) Process system multiplexing system
JPS55140364A (en) Dial data setting system of data transmission and receiving system
JPS5719830A (en) Multiple connection system
JPS57174726A (en) Data transfer controlling system
JPS54128226A (en) Random access memory
JPS57150017A (en) Direct memory access system
JPS575141A (en) Bus control system
JPS5738039A (en) Duplex system transmission controlling circuit
JPS5643896A (en) Key telephone control circuit
JPS5617550A (en) Storage switchboard
JPS53131706A (en) Automatic telephone exchange system
JPS5643850A (en) Intermultiplexer communication control system
JPS57176441A (en) Data transfer system
JPS5647146A (en) Data transmission system
JPS52120709A (en) Common line signal system
JPS5462743A (en) Communication control system
JPS55150032A (en) Data transfer system
JPS5613856A (en) Signal transmitting system
JPS56107689A (en) Connection control system of automatic exchange