JPS5624628A - Keyboard control device - Google Patents

Keyboard control device

Info

Publication number
JPS5624628A
JPS5624628A JP10019379A JP10019379A JPS5624628A JP S5624628 A JPS5624628 A JP S5624628A JP 10019379 A JP10019379 A JP 10019379A JP 10019379 A JP10019379 A JP 10019379A JP S5624628 A JPS5624628 A JP S5624628A
Authority
JP
Japan
Prior art keywords
fif02
data
kbu1
cpu3
accordance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10019379A
Other languages
Japanese (ja)
Inventor
Shizuo Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10019379A priority Critical patent/JPS5624628A/en
Publication of JPS5624628A publication Critical patent/JPS5624628A/en
Pending legal-status Critical Current

Links

Landscapes

  • Input From Keyboards Or The Like (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE: To form the program without consciousness of the existence of the buffer by constructing the first-in and first-out buffer so as to be empty automatically in the case striking key input is not carried out for a fixed period.
CONSTITUTION: When the operator strikes the key of the keyboard unit KBU1, the strobe signal for taking in the data corresponding to the struck key and the data are fed to the first-in and first-out buffer FIF02, and FIF02 inputs the data in accordance with the strobe signal from this KBU1 and stores it in FIF02. Further, in accordance with the request of CPU3, the stored data is transferred to CPU3 in accordance with the order of input. At this time, if FIF02 is empty, CPU3 shall wait until the data enters FIF02. The timer 4 monitors the strobe signal from KBU1 and when this signal disappears for more than a predetermined time, the reset signal to FIF02 is transmitted and all the data thereof is erased.
COPYRIGHT: (C)1981,JPO&Japio
JP10019379A 1979-08-08 1979-08-08 Keyboard control device Pending JPS5624628A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10019379A JPS5624628A (en) 1979-08-08 1979-08-08 Keyboard control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10019379A JPS5624628A (en) 1979-08-08 1979-08-08 Keyboard control device

Publications (1)

Publication Number Publication Date
JPS5624628A true JPS5624628A (en) 1981-03-09

Family

ID=14267459

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10019379A Pending JPS5624628A (en) 1979-08-08 1979-08-08 Keyboard control device

Country Status (1)

Country Link
JP (1) JPS5624628A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59109934A (en) * 1982-12-15 1984-06-25 Toshiba Corp Digital inputting circuit
JPS60129327U (en) * 1984-02-06 1985-08-30 大栄株式会社 Moisture-proof cardboard box equipment for packaging
US5056057A (en) * 1989-05-03 1991-10-08 Compaq Computer Corporation Keyboard interface for use in computers incorporating terminate-and-stay-resident programs

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59109934A (en) * 1982-12-15 1984-06-25 Toshiba Corp Digital inputting circuit
JPS60129327U (en) * 1984-02-06 1985-08-30 大栄株式会社 Moisture-proof cardboard box equipment for packaging
US5056057A (en) * 1989-05-03 1991-10-08 Compaq Computer Corporation Keyboard interface for use in computers incorporating terminate-and-stay-resident programs

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