JPS5620338A - Pll circuit - Google Patents

Pll circuit

Info

Publication number
JPS5620338A
JPS5620338A JP9623579A JP9623579A JPS5620338A JP S5620338 A JPS5620338 A JP S5620338A JP 9623579 A JP9623579 A JP 9623579A JP 9623579 A JP9623579 A JP 9623579A JP S5620338 A JPS5620338 A JP S5620338A
Authority
JP
Japan
Prior art keywords
signal
circuit
chrominance subcarrier
phase
waveform shaping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9623579A
Other languages
Japanese (ja)
Other versions
JPS6346614B2 (en
Inventor
Shinji Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP9623579A priority Critical patent/JPS5620338A/en
Publication of JPS5620338A publication Critical patent/JPS5620338A/en
Publication of JPS6346614B2 publication Critical patent/JPS6346614B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop

Abstract

PURPOSE:To automatically absorb an error due to fluctuations of temperature and variance in parts of delay elements, by making phase corrections of a burst signal and chrominance subcarrier signal through the same loop. CONSTITUTION:The output of waveform shaping circuit 9 of a PLL circuit and a color video signal from input terminal 1 are applied through HPFs 11 and 12 to switch circuit 13, which is changed over with a switching signal based upon a reproduced horizontal synchronizing signal from terminal 14 to extract a burst signal and chrominance subcarrier signal. Those successively extracted signals are supplied to gate circuits 19 and 20 through BPF17 and waveform shaping circuit 18 and also applied to counters 21 and 22. Further, the output of circuit 18 is applied to synchronizing circuit 24 and synchronized with the switching signal from monostable multivibrator 23 and then the burst signal and chrominance subcarrier signal are counted by counter 22, which when counting them up to a fixed number, applies a carry signal to gate circuit 20. Next, phase comparator 25 makes a phase comparison between gate circuits 19 and 20 to exercise control over phase modulator 26 of the PLL circuit.
JP9623579A 1979-07-28 1979-07-28 Pll circuit Granted JPS5620338A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9623579A JPS5620338A (en) 1979-07-28 1979-07-28 Pll circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9623579A JPS5620338A (en) 1979-07-28 1979-07-28 Pll circuit

Publications (2)

Publication Number Publication Date
JPS5620338A true JPS5620338A (en) 1981-02-25
JPS6346614B2 JPS6346614B2 (en) 1988-09-16

Family

ID=14159558

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9623579A Granted JPS5620338A (en) 1979-07-28 1979-07-28 Pll circuit

Country Status (1)

Country Link
JP (1) JPS5620338A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6429901B1 (en) 1997-01-23 2002-08-06 Sanyo Electric Co., Ltd. PLL circuit and phase lock detector

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6429901B1 (en) 1997-01-23 2002-08-06 Sanyo Electric Co., Ltd. PLL circuit and phase lock detector

Also Published As

Publication number Publication date
JPS6346614B2 (en) 1988-09-16

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