JPS56169957A - Modulating method for digital signal - Google Patents

Modulating method for digital signal

Info

Publication number
JPS56169957A
JPS56169957A JP7449580A JP7449580A JPS56169957A JP S56169957 A JPS56169957 A JP S56169957A JP 7449580 A JP7449580 A JP 7449580A JP 7449580 A JP7449580 A JP 7449580A JP S56169957 A JPS56169957 A JP S56169957A
Authority
JP
Japan
Prior art keywords
circuit
signal
code
outputted
fed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7449580A
Other languages
Japanese (ja)
Inventor
Takashi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7449580A priority Critical patent/JPS56169957A/en
Publication of JPS56169957A publication Critical patent/JPS56169957A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4915Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using pattern inversion or substitution

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To make the pickup of a clock signal by a PLL in the case of demodulation easy, by avoiding DC components in a frequency spectrum of a modulation signal and decreasing the ratio of the shortest and the longest inversion interval of the modulation signal. CONSTITUTION:A digital signal A from an input terminal 10 is grouped into M-bit, and the bit of 1 or 0 is added to a specified location of each group with a coding circuit 12. The 1st code signal B from the circuit 12 is counted for codes 1, 0 each block with the 1st counter 14, the data of the bit difference is outputted, it is delayed by one group's share at a delay circuit 16, and the result is fed to an E OR circuit 18 and a discrimination circuit 20. Further, the output of the counter 14 is fed to a circuit 20, and when an inversion signal F from the circuit 20 is 0, the 1st code signal B' is outputted from the circuit 18, and when 1, the code of the signal B' is inverted and the 2nd code signal C is outputted. This signal C is fed to the 2nd counter 24 and an detection circuit 26, and the total of the outputted bit difference and the code continuous signal E are fed to the circuit 20.
JP7449580A 1980-06-03 1980-06-03 Modulating method for digital signal Pending JPS56169957A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7449580A JPS56169957A (en) 1980-06-03 1980-06-03 Modulating method for digital signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7449580A JPS56169957A (en) 1980-06-03 1980-06-03 Modulating method for digital signal

Publications (1)

Publication Number Publication Date
JPS56169957A true JPS56169957A (en) 1981-12-26

Family

ID=13548933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7449580A Pending JPS56169957A (en) 1980-06-03 1980-06-03 Modulating method for digital signal

Country Status (1)

Country Link
JP (1) JPS56169957A (en)

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