JPS56169930A - Delay circuit - Google Patents
Delay circuitInfo
- Publication number
- JPS56169930A JPS56169930A JP7456680A JP7456680A JPS56169930A JP S56169930 A JPS56169930 A JP S56169930A JP 7456680 A JP7456680 A JP 7456680A JP 7456680 A JP7456680 A JP 7456680A JP S56169930 A JPS56169930 A JP S56169930A
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- pair
- delay element
- output
- pulses
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/14—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of delay lines
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
Abstract
PURPOSE:To obtain the output pulse with a constant pulse width at all times, by supplying a pair of pulses from an output tap of a tapped delay element to a flip- flop, in a delay circuit using the tapped delay element. CONSTITUTION:A pair of pulses C with constant time interval is applied to an input of a tapped delay element 24. The greater the delay time of delay pulses of output taps (d)-(f) of a delay element 24, the more deteriorated the waveform of pulse becomes, but the time interval of the pulse pair is unchanged. The pulse pair from the output tap of the delay element 24 is selected at a selection circuit 25, waveform is made by a comparator 26, and the result is inputted to a flip-flop 27, allowing to obtain the output pulse with a pulse width equal to the time interval of the pulse pair.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7456680A JPS56169930A (en) | 1980-06-03 | 1980-06-03 | Delay circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7456680A JPS56169930A (en) | 1980-06-03 | 1980-06-03 | Delay circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS56169930A true JPS56169930A (en) | 1981-12-26 |
Family
ID=13550887
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7456680A Pending JPS56169930A (en) | 1980-06-03 | 1980-06-03 | Delay circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56169930A (en) |
-
1980
- 1980-06-03 JP JP7456680A patent/JPS56169930A/en active Pending
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