JPS56169479A - Clamp circuit - Google Patents

Clamp circuit

Info

Publication number
JPS56169479A
JPS56169479A JP7315980A JP7315980A JPS56169479A JP S56169479 A JPS56169479 A JP S56169479A JP 7315980 A JP7315980 A JP 7315980A JP 7315980 A JP7315980 A JP 7315980A JP S56169479 A JPS56169479 A JP S56169479A
Authority
JP
Japan
Prior art keywords
digital
level
circuit
clamp
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7315980A
Other languages
English (en)
Japanese (ja)
Other versions
JPH028515B2 (enrdf_load_stackoverflow
Inventor
Masaaki Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7315980A priority Critical patent/JPS56169479A/ja
Publication of JPS56169479A publication Critical patent/JPS56169479A/ja
Publication of JPH028515B2 publication Critical patent/JPH028515B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/24—Systems for the transmission of television signals using pulse code modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Television Systems (AREA)
JP7315980A 1980-05-31 1980-05-31 Clamp circuit Granted JPS56169479A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7315980A JPS56169479A (en) 1980-05-31 1980-05-31 Clamp circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7315980A JPS56169479A (en) 1980-05-31 1980-05-31 Clamp circuit

Publications (2)

Publication Number Publication Date
JPS56169479A true JPS56169479A (en) 1981-12-26
JPH028515B2 JPH028515B2 (enrdf_load_stackoverflow) 1990-02-26

Family

ID=13510107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7315980A Granted JPS56169479A (en) 1980-05-31 1980-05-31 Clamp circuit

Country Status (1)

Country Link
JP (1) JPS56169479A (enrdf_load_stackoverflow)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57206177A (en) * 1981-05-02 1982-12-17 Philips Nv Dc level control circuit for video signal
JPS58210761A (ja) * 1982-06-01 1983-12-08 Nec Corp クランプ回路
JPS60113586A (ja) * 1983-11-24 1985-06-20 Nec Corp クランプ装置
JPS62122379A (ja) * 1985-11-21 1987-06-03 Nec Corp 映像信号直流再生回路
JPS63144761U (enrdf_load_stackoverflow) * 1987-03-13 1988-09-22
US7370247B2 (en) * 2005-09-28 2008-05-06 Intel Corporation Dynamic offset compensation based on false transitions

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57206177A (en) * 1981-05-02 1982-12-17 Philips Nv Dc level control circuit for video signal
JPS58210761A (ja) * 1982-06-01 1983-12-08 Nec Corp クランプ回路
JPS60113586A (ja) * 1983-11-24 1985-06-20 Nec Corp クランプ装置
JPS62122379A (ja) * 1985-11-21 1987-06-03 Nec Corp 映像信号直流再生回路
JPS63144761U (enrdf_load_stackoverflow) * 1987-03-13 1988-09-22
US7370247B2 (en) * 2005-09-28 2008-05-06 Intel Corporation Dynamic offset compensation based on false transitions

Also Published As

Publication number Publication date
JPH028515B2 (enrdf_load_stackoverflow) 1990-02-26

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